Lines Matching refs:adreno_gpu
172 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_zap_shader_load() local
185 return zap_shader_load_mdt(gpu, adreno_gpu->info->zapfw, pasid); in adreno_zap_shader_load()
222 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_get_param() local
226 *value = adreno_gpu->info->revn; in adreno_get_param()
229 *value = adreno_gpu->gmem; in adreno_get_param()
232 *value = !adreno_is_a650(adreno_gpu) ? 0x100000 : 0; in adreno_get_param()
235 *value = adreno_gpu->rev.patchid | in adreno_get_param()
236 (adreno_gpu->rev.minor << 8) | in adreno_get_param()
237 (adreno_gpu->rev.major << 16) | in adreno_get_param()
238 (adreno_gpu->rev.core << 24); in adreno_get_param()
241 *value = adreno_gpu->base.fast_rate; in adreno_get_param()
244 if (adreno_gpu->funcs->get_timestamp) { in adreno_get_param()
248 ret = adreno_gpu->funcs->get_timestamp(gpu, value); in adreno_get_param()
270 adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname) in adreno_request_fw() argument
272 struct drm_device *drm = adreno_gpu->base.dev; in adreno_request_fw()
285 if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) || in adreno_request_fw()
286 (adreno_gpu->fwloc == FW_LOCATION_NEW)) { in adreno_request_fw()
292 adreno_gpu->fwloc = FW_LOCATION_NEW; in adreno_request_fw()
294 } else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) { in adreno_request_fw()
305 if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) || in adreno_request_fw()
306 (adreno_gpu->fwloc == FW_LOCATION_LEGACY)) { in adreno_request_fw()
312 adreno_gpu->fwloc = FW_LOCATION_LEGACY; in adreno_request_fw()
314 } else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) { in adreno_request_fw()
326 if ((adreno_gpu->fwloc == FW_LOCATION_UNKNOWN) || in adreno_request_fw()
327 (adreno_gpu->fwloc == FW_LOCATION_HELPER)) { in adreno_request_fw()
333 adreno_gpu->fwloc = FW_LOCATION_HELPER; in adreno_request_fw()
335 } else if (adreno_gpu->fwloc != FW_LOCATION_UNKNOWN) { in adreno_request_fw()
350 int adreno_load_fw(struct adreno_gpu *adreno_gpu) in adreno_load_fw() argument
354 for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++) { in adreno_load_fw()
357 if (!adreno_gpu->info->fw[i]) in adreno_load_fw()
361 if (adreno_gpu->fw[i]) in adreno_load_fw()
364 fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->fw[i]); in adreno_load_fw()
368 adreno_gpu->fw[i] = fw; in adreno_load_fw()
395 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_hw_init() local
400 ret = adreno_load_fw(adreno_gpu); in adreno_hw_init()
422 static uint32_t get_rptr(struct adreno_gpu *adreno_gpu, in get_rptr() argument
425 struct msm_gpu *gpu = &adreno_gpu->base; in get_rptr()
475 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_idle() local
479 if (!spin_until(get_rptr(adreno_gpu, ring) == wptr)) in adreno_idle()
484 gpu->name, ring->id, get_rptr(adreno_gpu, ring), wptr); in adreno_idle()
491 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_gpu_state_get() local
504 state->ring[i].rptr = get_rptr(adreno_gpu, gpu->rb[i]); in adreno_gpu_state_get()
525 if (!adreno_gpu->registers) in adreno_gpu_state_get()
529 for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) in adreno_gpu_state_get()
530 count += adreno_gpu->registers[i + 1] - in adreno_gpu_state_get()
531 adreno_gpu->registers[i] + 1; in adreno_gpu_state_get()
537 for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) { in adreno_gpu_state_get()
538 u32 start = adreno_gpu->registers[i]; in adreno_gpu_state_get()
539 u32 end = adreno_gpu->registers[i + 1]; in adreno_gpu_state_get()
664 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_show() local
671 adreno_gpu->info->revn, adreno_gpu->rev.core, in adreno_show()
672 adreno_gpu->rev.major, adreno_gpu->rev.minor, in adreno_show()
673 adreno_gpu->rev.patchid); in adreno_show()
725 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_dump_info() local
729 adreno_gpu->info->revn, adreno_gpu->rev.core, in adreno_dump_info()
730 adreno_gpu->rev.major, adreno_gpu->rev.minor, in adreno_dump_info()
731 adreno_gpu->rev.patchid); in adreno_dump_info()
740 printk("rptr: %d\n", get_rptr(adreno_gpu, ring)); in adreno_dump_info()
748 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_dump() local
751 if (!adreno_gpu->registers) in adreno_dump()
756 for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) { in adreno_dump()
757 uint32_t start = adreno_gpu->registers[i]; in adreno_dump()
758 uint32_t end = adreno_gpu->registers[i+1]; in adreno_dump()
770 struct adreno_gpu *adreno_gpu = to_adreno_gpu(ring->gpu); in ring_freewords() local
774 uint32_t rptr = get_rptr(adreno_gpu, ring); in ring_freewords()
855 int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu, in adreno_gpu_ocmem_init() argument
875 ocmem_hdl = ocmem_allocate(ocmem, OCMEM_GRAPHICS, adreno_gpu->gmem); in adreno_gpu_ocmem_init()
882 adreno_gpu->gmem = ocmem_hdl->len; in adreno_gpu_ocmem_init()
895 struct adreno_gpu *adreno_gpu, in adreno_gpu_init() argument
901 struct msm_gpu *gpu = &adreno_gpu->base; in adreno_gpu_init()
904 adreno_gpu->funcs = funcs; in adreno_gpu_init()
905 adreno_gpu->info = adreno_info(config->rev); in adreno_gpu_init()
906 adreno_gpu->gmem = adreno_gpu->info->gmem; in adreno_gpu_init()
907 adreno_gpu->revn = adreno_gpu->info->revn; in adreno_gpu_init()
908 adreno_gpu->rev = config->rev; in adreno_gpu_init()
917 adreno_gpu->info->inactive_period); in adreno_gpu_init()
921 ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base, in adreno_gpu_init()
922 adreno_gpu->info->name, &adreno_gpu_config); in adreno_gpu_init()
954 void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu) in adreno_gpu_cleanup() argument
956 struct msm_gpu *gpu = &adreno_gpu->base; in adreno_gpu_cleanup()
960 for (i = 0; i < ARRAY_SIZE(adreno_gpu->info->fw); i++) in adreno_gpu_cleanup()
961 release_firmware(adreno_gpu->fw[i]); in adreno_gpu_cleanup()
965 msm_gpu_cleanup(&adreno_gpu->base); in adreno_gpu_cleanup()