1166 static inline uint32_t A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()  argument
1168 …return ((val) << A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()
1172 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()  argument
1174 …return ((val) << A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()
1178 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()  argument
1180 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()
1184 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()  argument
1186 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()
1190 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()  argument
1192 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()
1196 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()  argument
1198 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()
1202 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()  argument
1204 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()
1208 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()  argument
1210 …return ((val) << A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_…  in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()
1214 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()  argument
1216 …return ((val) << A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_…  in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()
1220 static inline uint32_t A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()  argument
1222 …return ((val) << A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()
1226 static inline uint32_t A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR()  argument
1228 …return ((val) << A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR()
1234 static inline uint32_t A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS(uint32_t val)  in A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS()  argument
1236 …return ((val) << A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__SHIFT) & A2XX_MH_MMU_VA_RANGE_NUM_64KB_REG…  in A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS()
1240 static inline uint32_t A2XX_MH_MMU_VA_RANGE_VA_BASE(uint32_t val)  in A2XX_MH_MMU_VA_RANGE_VA_BASE()  argument
1242 	return ((val) << A2XX_MH_MMU_VA_RANGE_VA_BASE__SHIFT) & A2XX_MH_MMU_VA_RANGE_VA_BASE__MASK;  in A2XX_MH_MMU_VA_RANGE_VA_BASE()
1341 static inline uint32_t A2XX_RBBM_STATUS_CMDFIFO_AVAIL(uint32_t val)  in A2XX_RBBM_STATUS_CMDFIFO_AVAIL()  argument
1343 	return ((val) << A2XX_RBBM_STATUS_CMDFIFO_AVAIL__SHIFT) & A2XX_RBBM_STATUS_CMDFIFO_AVAIL__MASK;  in A2XX_RBBM_STATUS_CMDFIFO_AVAIL()
1368 static inline uint32_t A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT()  argument
1370 …return ((val) << A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__SHIFT) & A2XX_MH_ARBITER_CONFIG_SAME_PAGE…  in A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT()
1378 static inline uint32_t A2XX_MH_ARBITER_CONFIG_PAGE_SIZE(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_PAGE_SIZE()  argument
1380 	return ((val) << A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__SHIFT) & A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__MASK;  in A2XX_MH_ARBITER_CONFIG_PAGE_SIZE()
1387 static inline uint32_t A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT()  argument
1389 …return ((val) << A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__SHIFT) & A2XX_MH_ARBITER_CONFIG_IN_FLIGHT…  in A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT()
1413 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A2XX_A220_VSC_BIN_SIZE_WIDTH()  argument
1415 	return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT) & A2XX_A220_VSC_BIN_SIZE_WIDTH__MASK;  in A2XX_A220_VSC_BIN_SIZE_WIDTH()
1419 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A2XX_A220_VSC_BIN_SIZE_HEIGHT()  argument
1421 	return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT) & A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK;  in A2XX_A220_VSC_BIN_SIZE_HEIGHT()
1449 static inline uint32_t A2XX_PA_SU_FACE_DATA_BASE_ADDR(uint32_t val)  in A2XX_PA_SU_FACE_DATA_BASE_ADDR()  argument
1451 	return ((val) << A2XX_PA_SU_FACE_DATA_BASE_ADDR__SHIFT) & A2XX_PA_SU_FACE_DATA_BASE_ADDR__MASK;  in A2XX_PA_SU_FACE_DATA_BASE_ADDR()
1458 static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX(uint32_t val)  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX()  argument
1460 …return ((val) << A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__SHIFT) & A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX…  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX()
1464 static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX(uint32_t val)  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX()  argument
1466 …return ((val) << A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT) & A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX…  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX()
1474 static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX(uint32_t val)  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX()  argument
1476 …return ((val) << A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__SHIFT) & A2XX_SQ_INST_STORE_MANAGMENT…  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX()
1480 static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX(uint32_t val)  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX()  argument
1482 …return ((val) << A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__SHIFT) & A2XX_SQ_INST_STORE_MANAGMENT…  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX()
1542 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT()  argument
1544 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_TIMEOU…  in A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT()
1553 static inline uint32_t A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT(uint32_t val)  in A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT()  argument
1555 …return ((val) << A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__SHIFT) & A2XX_RB_BC_CONTROL_AZ_THROTTLE_COU…  in A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT()
1563 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK()  argument
1565 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK…  in A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK()
1570 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT()  argument
1572 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_DATA_…  in A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT()
1576 static inline uint32_t A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT(uint32_t val)  in A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT()  argument
1578 …return ((val) << A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__SHIFT) & A2XX_RB_BC_CONTROL_MEM_EXP…  in A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT()
1593 static inline uint32_t A2XX_RB_SURFACE_INFO_SURFACE_PITCH(uint32_t val)  in A2XX_RB_SURFACE_INFO_SURFACE_PITCH()  argument
1595 …return ((val) << A2XX_RB_SURFACE_INFO_SURFACE_PITCH__SHIFT) & A2XX_RB_SURFACE_INFO_SURFACE_PITCH__…  in A2XX_RB_SURFACE_INFO_SURFACE_PITCH()
1599 static inline uint32_t A2XX_RB_SURFACE_INFO_MSAA_SAMPLES(uint32_t val)  in A2XX_RB_SURFACE_INFO_MSAA_SAMPLES()  argument
1601 …return ((val) << A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__SHIFT) & A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__MA…  in A2XX_RB_SURFACE_INFO_MSAA_SAMPLES()
1607 static inline uint32_t A2XX_RB_COLOR_INFO_FORMAT(enum a2xx_colorformatx val)  in A2XX_RB_COLOR_INFO_FORMAT()  argument
1609 	return ((val) << A2XX_RB_COLOR_INFO_FORMAT__SHIFT) & A2XX_RB_COLOR_INFO_FORMAT__MASK;  in A2XX_RB_COLOR_INFO_FORMAT()
1613 static inline uint32_t A2XX_RB_COLOR_INFO_ROUND_MODE(uint32_t val)  in A2XX_RB_COLOR_INFO_ROUND_MODE()  argument
1615 	return ((val) << A2XX_RB_COLOR_INFO_ROUND_MODE__SHIFT) & A2XX_RB_COLOR_INFO_ROUND_MODE__MASK;  in A2XX_RB_COLOR_INFO_ROUND_MODE()
1620 static inline uint32_t A2XX_RB_COLOR_INFO_ENDIAN(uint32_t val)  in A2XX_RB_COLOR_INFO_ENDIAN()  argument
1622 	return ((val) << A2XX_RB_COLOR_INFO_ENDIAN__SHIFT) & A2XX_RB_COLOR_INFO_ENDIAN__MASK;  in A2XX_RB_COLOR_INFO_ENDIAN()
1626 static inline uint32_t A2XX_RB_COLOR_INFO_SWAP(uint32_t val)  in A2XX_RB_COLOR_INFO_SWAP()  argument
1628 	return ((val) << A2XX_RB_COLOR_INFO_SWAP__SHIFT) & A2XX_RB_COLOR_INFO_SWAP__MASK;  in A2XX_RB_COLOR_INFO_SWAP()
1632 static inline uint32_t A2XX_RB_COLOR_INFO_BASE(uint32_t val)  in A2XX_RB_COLOR_INFO_BASE()  argument
1634 	return ((val >> 12) << A2XX_RB_COLOR_INFO_BASE__SHIFT) & A2XX_RB_COLOR_INFO_BASE__MASK;  in A2XX_RB_COLOR_INFO_BASE()
1640 static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val)  in A2XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
1642 	return ((val) << A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A2XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1646 static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A2XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
1648 	return ((val >> 12) << A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A2XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A2XX_RB_DEPTH_INFO_DEPTH_BASE()
1659 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_TL_X()  argument
1661 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_TL_X__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_TL_X()
1665 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_TL_Y()  argument
1667 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_TL_Y()
1674 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_BR_X()  argument
1676 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_BR_X__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_BR_X()
1680 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_BR_Y()  argument
1682 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_BR_Y()
1688 static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_X(int32_t val)  in A2XX_PA_SC_WINDOW_OFFSET_X()  argument
1690 	return ((val) << A2XX_PA_SC_WINDOW_OFFSET_X__SHIFT) & A2XX_PA_SC_WINDOW_OFFSET_X__MASK;  in A2XX_PA_SC_WINDOW_OFFSET_X()
1694 static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_Y(int32_t val)  in A2XX_PA_SC_WINDOW_OFFSET_Y()  argument
1696 	return ((val) << A2XX_PA_SC_WINDOW_OFFSET_Y__SHIFT) & A2XX_PA_SC_WINDOW_OFFSET_Y__MASK;  in A2XX_PA_SC_WINDOW_OFFSET_Y()
1704 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_TL_X()  argument
1706 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_TL_X__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_TL_X()
1710 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_TL_Y()  argument
1712 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_TL_Y()
1719 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_BR_X()  argument
1721 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_BR_X__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_BR_X()
1725 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_BR_Y()  argument
1727 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_BR_Y()
1757 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_RED(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_RED()  argument
1759 	return ((val) << A2XX_RB_FOG_COLOR_FOG_RED__SHIFT) & A2XX_RB_FOG_COLOR_FOG_RED__MASK;  in A2XX_RB_FOG_COLOR_FOG_RED()
1763 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_GREEN(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_GREEN()  argument
1765 	return ((val) << A2XX_RB_FOG_COLOR_FOG_GREEN__SHIFT) & A2XX_RB_FOG_COLOR_FOG_GREEN__MASK;  in A2XX_RB_FOG_COLOR_FOG_GREEN()
1769 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_BLUE(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_BLUE()  argument
1771 	return ((val) << A2XX_RB_FOG_COLOR_FOG_BLUE__SHIFT) & A2XX_RB_FOG_COLOR_FOG_BLUE__MASK;  in A2XX_RB_FOG_COLOR_FOG_BLUE()
1777 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
1779 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A2XX_RB_STENCILREFMASK_BF_STENCILR…  in A2XX_RB_STENCILREFMASK_BF_STENCILREF()
1783 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
1785 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A2XX_RB_STENCILREFMASK_BF_STENCIL…  in A2XX_RB_STENCILREFMASK_BF_STENCILMASK()
1789 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
1791 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A2XX_RB_STENCILREFMASK_BF_ST…  in A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1797 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILREF()  argument
1799 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILREF__MA…  in A2XX_RB_STENCILREFMASK_STENCILREF()
1803 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILMASK()  argument
1805 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILMASK__…  in A2XX_RB_STENCILREFMASK_STENCILMASK()
1809 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
1811 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILW…  in A2XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1819 static inline uint32_t A2XX_PA_CL_VPORT_XSCALE(float val)  in A2XX_PA_CL_VPORT_XSCALE()  argument
1821 	return ((fui(val)) << A2XX_PA_CL_VPORT_XSCALE__SHIFT) & A2XX_PA_CL_VPORT_XSCALE__MASK;  in A2XX_PA_CL_VPORT_XSCALE()
1827 static inline uint32_t A2XX_PA_CL_VPORT_XOFFSET(float val)  in A2XX_PA_CL_VPORT_XOFFSET()  argument
1829 	return ((fui(val)) << A2XX_PA_CL_VPORT_XOFFSET__SHIFT) & A2XX_PA_CL_VPORT_XOFFSET__MASK;  in A2XX_PA_CL_VPORT_XOFFSET()
1835 static inline uint32_t A2XX_PA_CL_VPORT_YSCALE(float val)  in A2XX_PA_CL_VPORT_YSCALE()  argument
1837 	return ((fui(val)) << A2XX_PA_CL_VPORT_YSCALE__SHIFT) & A2XX_PA_CL_VPORT_YSCALE__MASK;  in A2XX_PA_CL_VPORT_YSCALE()
1843 static inline uint32_t A2XX_PA_CL_VPORT_YOFFSET(float val)  in A2XX_PA_CL_VPORT_YOFFSET()  argument
1845 	return ((fui(val)) << A2XX_PA_CL_VPORT_YOFFSET__SHIFT) & A2XX_PA_CL_VPORT_YOFFSET__MASK;  in A2XX_PA_CL_VPORT_YOFFSET()
1851 static inline uint32_t A2XX_PA_CL_VPORT_ZSCALE(float val)  in A2XX_PA_CL_VPORT_ZSCALE()  argument
1853 	return ((fui(val)) << A2XX_PA_CL_VPORT_ZSCALE__SHIFT) & A2XX_PA_CL_VPORT_ZSCALE__MASK;  in A2XX_PA_CL_VPORT_ZSCALE()
1859 static inline uint32_t A2XX_PA_CL_VPORT_ZOFFSET(float val)  in A2XX_PA_CL_VPORT_ZOFFSET()  argument
1861 	return ((fui(val)) << A2XX_PA_CL_VPORT_ZOFFSET__SHIFT) & A2XX_PA_CL_VPORT_ZOFFSET__MASK;  in A2XX_PA_CL_VPORT_ZOFFSET()
1867 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_REGS(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_VS_REGS()  argument
1869 	return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_REGS__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_REGS__MASK;  in A2XX_SQ_PROGRAM_CNTL_VS_REGS()
1873 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_REGS(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_PS_REGS()  argument
1875 	return ((val) << A2XX_SQ_PROGRAM_CNTL_PS_REGS__SHIFT) & A2XX_SQ_PROGRAM_CNTL_PS_REGS__MASK;  in A2XX_SQ_PROGRAM_CNTL_PS_REGS()
1883 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT()  argument
1885 …return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COU…  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT()
1889 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE(enum a2xx_sq_ps_vtx_mode val)  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE()  argument
1891 …return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE…  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE()
1895 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE()  argument
1897 …return ((val) << A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__SHIFT) & A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE…  in A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE()
1906 static inline uint32_t A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(enum a2xx_sq_sample_cntl val)  in A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL()  argument
1908 …return ((val) << A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__SHIFT) & A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL…  in A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL()
1912 static inline uint32_t A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS(uint32_t val)  in A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS()  argument
1914 …return ((val) << A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__SHIFT) & A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__…  in A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS()
1923 static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE(uint32_t val)  in A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE()  argument
1925 …return ((val) << A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__SHIFT) & A2XX_SQ_INTERPOLATOR_CNTL_PARAM_S…  in A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE()
1929 static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN(uint32_t val)  in A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN()  argument
1931 …return ((val) << A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__SHIFT) & A2XX_SQ_INTERPOLATOR_CNTL_SA…  in A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN()
1937 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_0(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_0()  argument
1939 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_0()
1943 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_1(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_1()  argument
1945 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_1()
1949 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_2(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_2()  argument
1951 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_2()
1955 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_3(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_3()  argument
1957 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_3()
1961 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_4(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_4()  argument
1963 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_4()
1967 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_5(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_5()  argument
1969 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_5()
1973 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_6(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_6()  argument
1975 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_6()
1979 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_7(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_7()  argument
1981 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_7()
1987 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_8(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_8()  argument
1989 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_8()
1993 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_9(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_9()  argument
1995 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_9()
1999 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_10(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_10()  argument
2001 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_10()
2005 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_11(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_11()  argument
2007 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_11()
2011 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_12(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_12()  argument
2013 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_12()
2017 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_13(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_13()  argument
2019 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_13()
2023 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_14(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_14()  argument
2025 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_14()
2029 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_15(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_15()  argument
2031 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_15()
2037 static inline uint32_t A2XX_SQ_PS_PROGRAM_BASE(uint32_t val)  in A2XX_SQ_PS_PROGRAM_BASE()  argument
2039 	return ((val) << A2XX_SQ_PS_PROGRAM_BASE__SHIFT) & A2XX_SQ_PS_PROGRAM_BASE__MASK;  in A2XX_SQ_PS_PROGRAM_BASE()
2043 static inline uint32_t A2XX_SQ_PS_PROGRAM_SIZE(uint32_t val)  in A2XX_SQ_PS_PROGRAM_SIZE()  argument
2045 	return ((val) << A2XX_SQ_PS_PROGRAM_SIZE__SHIFT) & A2XX_SQ_PS_PROGRAM_SIZE__MASK;  in A2XX_SQ_PS_PROGRAM_SIZE()
2051 static inline uint32_t A2XX_SQ_VS_PROGRAM_BASE(uint32_t val)  in A2XX_SQ_VS_PROGRAM_BASE()  argument
2053 	return ((val) << A2XX_SQ_VS_PROGRAM_BASE__SHIFT) & A2XX_SQ_VS_PROGRAM_BASE__MASK;  in A2XX_SQ_VS_PROGRAM_BASE()
2057 static inline uint32_t A2XX_SQ_VS_PROGRAM_SIZE(uint32_t val)  in A2XX_SQ_VS_PROGRAM_SIZE()  argument
2059 	return ((val) << A2XX_SQ_VS_PROGRAM_SIZE__SHIFT) & A2XX_SQ_VS_PROGRAM_SIZE__MASK;  in A2XX_SQ_VS_PROGRAM_SIZE()
2067 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val)  in A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE()  argument
2069 …return ((val) << A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) & A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MA…  in A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE()
2073 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val)  in A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()  argument
2075 …return ((val) << A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) & A2XX_VGT_DRAW_INITIATOR_SOURCE_SE…  in A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()
2079 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val)  in A2XX_VGT_DRAW_INITIATOR_VIS_CULL()  argument
2081 	return ((val) << A2XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) & A2XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK;  in A2XX_VGT_DRAW_INITIATOR_VIS_CULL()
2085 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val)  in A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE()  argument
2087 …return ((val) << A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) & A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__…  in A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE()
2094 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)  in A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()  argument
2096 …return ((val) << A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A2XX_VGT_DRAW_INITIATOR_NUM_INSTA…  in A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()
2108 static inline uint32_t A2XX_RB_DEPTHCONTROL_ZFUNC(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_ZFUNC()  argument
2110 	return ((val) << A2XX_RB_DEPTHCONTROL_ZFUNC__SHIFT) & A2XX_RB_DEPTHCONTROL_ZFUNC__MASK;  in A2XX_RB_DEPTHCONTROL_ZFUNC()
2115 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_STENCILFUNC()  argument
2117 	return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFUNC__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFUNC__MASK;  in A2XX_RB_DEPTHCONTROL_STENCILFUNC()
2121 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILFAIL()  argument
2123 	return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFAIL__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFAIL__MASK;  in A2XX_RB_DEPTHCONTROL_STENCILFAIL()
2127 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZPASS()  argument
2129 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZPASS__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZPASS__MA…  in A2XX_RB_DEPTHCONTROL_STENCILZPASS()
2133 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL()  argument
2135 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZFAIL__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZFAIL__MA…  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL()
2139 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF()  argument
2141 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF…  in A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF()
2145 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF()  argument
2147 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF…  in A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF()
2151 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF()  argument
2153 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZPASS_…  in A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF()
2157 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF()  argument
2159 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZFAIL_…  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF()
2165 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND()  argument
2167 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_SRCBLE…  in A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND()
2171 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(enum a2xx_rb_blend_opcode val)  in A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN()  argument
2173 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_COMB_F…  in A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN()
2177 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND()  argument
2179 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_DESTB…  in A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND()
2183 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND()  argument
2185 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLE…  in A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND()
2189 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(enum a2xx_rb_blend_opcode val)  in A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN()  argument
2191 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_COMB_F…  in A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN()
2195 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND()  argument
2197 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_DESTB…  in A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND()
2205 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_FUNC(enum adreno_compare_func val)  in A2XX_RB_COLORCONTROL_ALPHA_FUNC()  argument
2207 	return ((val) << A2XX_RB_COLORCONTROL_ALPHA_FUNC__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_FUNC__MASK;  in A2XX_RB_COLORCONTROL_ALPHA_FUNC()
2216 static inline uint32_t A2XX_RB_COLORCONTROL_ROP_CODE(uint32_t val)  in A2XX_RB_COLORCONTROL_ROP_CODE()  argument
2218 	return ((val) << A2XX_RB_COLORCONTROL_ROP_CODE__SHIFT) & A2XX_RB_COLORCONTROL_ROP_CODE__MASK;  in A2XX_RB_COLORCONTROL_ROP_CODE()
2222 static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_MODE(enum adreno_rb_dither_mode val)  in A2XX_RB_COLORCONTROL_DITHER_MODE()  argument
2224 	return ((val) << A2XX_RB_COLORCONTROL_DITHER_MODE__SHIFT) & A2XX_RB_COLORCONTROL_DITHER_MODE__MASK;  in A2XX_RB_COLORCONTROL_DITHER_MODE()
2228 static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_TYPE(enum a2xx_rb_dither_type val)  in A2XX_RB_COLORCONTROL_DITHER_TYPE()  argument
2230 	return ((val) << A2XX_RB_COLORCONTROL_DITHER_TYPE__SHIFT) & A2XX_RB_COLORCONTROL_DITHER_TYPE__MASK;  in A2XX_RB_COLORCONTROL_DITHER_TYPE()
2235 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0()  argument
2237 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0()
2241 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1()  argument
2243 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1()
2247 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2()  argument
2249 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2()
2253 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3()  argument
2255 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3()
2261 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN()  argument
2263 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__…  in A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN()
2267 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_ROW(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_ROW()  argument
2269 	return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__MASK;  in A2XX_VGT_CURRENT_BIN_ID_MAX_ROW()
2273 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK()  argument
2275 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX…  in A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK()
2283 static inline uint32_t A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF(enum a2xx_dx_clip_space val)  in A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF()  argument
2285 …return ((val) << A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__SHIFT) & A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPA…  in A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF()
2299 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_POLYMODE(enum a2xx_pa_su_sc_polymode val)  in A2XX_PA_SU_SC_MODE_CNTL_POLYMODE()  argument
2301 	return ((val) << A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__MASK;  in A2XX_PA_SU_SC_MODE_CNTL_POLYMODE()
2305 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE()  argument
2307 …return ((val) << A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE…  in A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE()
2311 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE()  argument
2313 …return ((val) << A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__…  in A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE()
2347 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN()  argument
2349 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__…  in A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN()
2353 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_ROW(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_ROW()  argument
2355 	return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__MASK;  in A2XX_VGT_CURRENT_BIN_ID_MIN_ROW()
2359 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK()  argument
2361 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN…  in A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK()
2367 static inline uint32_t A2XX_RB_MODECONTROL_EDRAM_MODE(enum a2xx_rb_edram_mode val)  in A2XX_RB_MODECONTROL_EDRAM_MODE()  argument
2369 	return ((val) << A2XX_RB_MODECONTROL_EDRAM_MODE__SHIFT) & A2XX_RB_MODECONTROL_EDRAM_MODE__MASK;  in A2XX_RB_MODECONTROL_EDRAM_MODE()
2379 static inline uint32_t A2XX_CLEAR_COLOR_RED(uint32_t val)  in A2XX_CLEAR_COLOR_RED()  argument
2381 	return ((val) << A2XX_CLEAR_COLOR_RED__SHIFT) & A2XX_CLEAR_COLOR_RED__MASK;  in A2XX_CLEAR_COLOR_RED()
2385 static inline uint32_t A2XX_CLEAR_COLOR_GREEN(uint32_t val)  in A2XX_CLEAR_COLOR_GREEN()  argument
2387 	return ((val) << A2XX_CLEAR_COLOR_GREEN__SHIFT) & A2XX_CLEAR_COLOR_GREEN__MASK;  in A2XX_CLEAR_COLOR_GREEN()
2391 static inline uint32_t A2XX_CLEAR_COLOR_BLUE(uint32_t val)  in A2XX_CLEAR_COLOR_BLUE()  argument
2393 	return ((val) << A2XX_CLEAR_COLOR_BLUE__SHIFT) & A2XX_CLEAR_COLOR_BLUE__MASK;  in A2XX_CLEAR_COLOR_BLUE()
2397 static inline uint32_t A2XX_CLEAR_COLOR_ALPHA(uint32_t val)  in A2XX_CLEAR_COLOR_ALPHA()  argument
2399 	return ((val) << A2XX_CLEAR_COLOR_ALPHA__SHIFT) & A2XX_CLEAR_COLOR_ALPHA__MASK;  in A2XX_CLEAR_COLOR_ALPHA()
2407 static inline uint32_t A2XX_PA_SU_POINT_SIZE_HEIGHT(float val)  in A2XX_PA_SU_POINT_SIZE_HEIGHT()  argument
2409 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_SIZE_HEIGHT__SHIFT) & A2XX_PA_SU_POINT_SIZE…  in A2XX_PA_SU_POINT_SIZE_HEIGHT()
2413 static inline uint32_t A2XX_PA_SU_POINT_SIZE_WIDTH(float val)  in A2XX_PA_SU_POINT_SIZE_WIDTH()  argument
2415 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_SIZE_WIDTH__SHIFT) & A2XX_PA_SU_POINT_SIZE_…  in A2XX_PA_SU_POINT_SIZE_WIDTH()
2421 static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MIN(float val)  in A2XX_PA_SU_POINT_MINMAX_MIN()  argument
2423 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_MINMAX_MIN__SHIFT) & A2XX_PA_SU_POINT_MINMA…  in A2XX_PA_SU_POINT_MINMAX_MIN()
2427 static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MAX(float val)  in A2XX_PA_SU_POINT_MINMAX_MAX()  argument
2429 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_MINMAX_MAX__SHIFT) & A2XX_PA_SU_POINT_MINMA…  in A2XX_PA_SU_POINT_MINMAX_MAX()
2435 static inline uint32_t A2XX_PA_SU_LINE_CNTL_WIDTH(float val)  in A2XX_PA_SU_LINE_CNTL_WIDTH()  argument
2437 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_LINE_CNTL_WIDTH__SHIFT) & A2XX_PA_SU_LINE_CNTL_WI…  in A2XX_PA_SU_LINE_CNTL_WIDTH()
2443 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN(uint32_t val)  in A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN()  argument
2445 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_LINE_PATTE…  in A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN()
2449 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT(uint32_t val)  in A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT()  argument
2451 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_REPEAT_COU…  in A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT()
2455 …ic inline uint32_t A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER(enum a2xx_pa_sc_pattern_bit_order val)  in A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER()  argument
2457 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_PATTE…  in A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER()
2461 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL(enum a2xx_pa_sc_auto_reset_cntl val)  in A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL()  argument
2463 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_AUTO_RE…  in A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL()
2470 static inline uint32_t A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID(uint32_t val)  in A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID()  argument
2472 …return ((val) << A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__SHIFT) & A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__MA…  in A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID()
2481 static inline uint32_t A2XX_PA_SC_LINE_CNTL_BRES_CNTL(uint32_t val)  in A2XX_PA_SC_LINE_CNTL_BRES_CNTL()  argument
2483 	return ((val) << A2XX_PA_SC_LINE_CNTL_BRES_CNTL__SHIFT) & A2XX_PA_SC_LINE_CNTL_BRES_CNTL__MASK;  in A2XX_PA_SC_LINE_CNTL_BRES_CNTL()
2492 static inline uint32_t A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES(uint32_t val)  in A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES()  argument
2494 …return ((val) << A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__SHIFT) & A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAM…  in A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES()
2498 static inline uint32_t A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST(uint32_t val)  in A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST()  argument
2500 …return ((val) << A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__SHIFT) & A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DI…  in A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST()
2506 static inline uint32_t A2XX_PA_SU_VTX_CNTL_PIX_CENTER(enum a2xx_pa_pixcenter val)  in A2XX_PA_SU_VTX_CNTL_PIX_CENTER()  argument
2508 	return ((val) << A2XX_PA_SU_VTX_CNTL_PIX_CENTER__SHIFT) & A2XX_PA_SU_VTX_CNTL_PIX_CENTER__MASK;  in A2XX_PA_SU_VTX_CNTL_PIX_CENTER()
2512 static inline uint32_t A2XX_PA_SU_VTX_CNTL_ROUND_MODE(enum a2xx_pa_roundmode val)  in A2XX_PA_SU_VTX_CNTL_ROUND_MODE()  argument
2514 	return ((val) << A2XX_PA_SU_VTX_CNTL_ROUND_MODE__SHIFT) & A2XX_PA_SU_VTX_CNTL_ROUND_MODE__MASK;  in A2XX_PA_SU_VTX_CNTL_ROUND_MODE()
2518 static inline uint32_t A2XX_PA_SU_VTX_CNTL_QUANT_MODE(enum a2xx_pa_quantmode val)  in A2XX_PA_SU_VTX_CNTL_QUANT_MODE()  argument
2520 	return ((val) << A2XX_PA_SU_VTX_CNTL_QUANT_MODE__SHIFT) & A2XX_PA_SU_VTX_CNTL_QUANT_MODE__MASK;  in A2XX_PA_SU_VTX_CNTL_QUANT_MODE()
2526 static inline uint32_t A2XX_PA_CL_GB_VERT_CLIP_ADJ(float val)  in A2XX_PA_CL_GB_VERT_CLIP_ADJ()  argument
2528 	return ((fui(val)) << A2XX_PA_CL_GB_VERT_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_CLIP_ADJ__MASK;  in A2XX_PA_CL_GB_VERT_CLIP_ADJ()
2534 static inline uint32_t A2XX_PA_CL_GB_VERT_DISC_ADJ(float val)  in A2XX_PA_CL_GB_VERT_DISC_ADJ()  argument
2536 	return ((fui(val)) << A2XX_PA_CL_GB_VERT_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_DISC_ADJ__MASK;  in A2XX_PA_CL_GB_VERT_DISC_ADJ()
2542 static inline uint32_t A2XX_PA_CL_GB_HORZ_CLIP_ADJ(float val)  in A2XX_PA_CL_GB_HORZ_CLIP_ADJ()  argument
2544 	return ((fui(val)) << A2XX_PA_CL_GB_HORZ_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_CLIP_ADJ__MASK;  in A2XX_PA_CL_GB_HORZ_CLIP_ADJ()
2550 static inline uint32_t A2XX_PA_CL_GB_HORZ_DISC_ADJ(float val)  in A2XX_PA_CL_GB_HORZ_DISC_ADJ()  argument
2552 	return ((fui(val)) << A2XX_PA_CL_GB_HORZ_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_DISC_ADJ__MASK;  in A2XX_PA_CL_GB_HORZ_DISC_ADJ()
2558 static inline uint32_t A2XX_SQ_VS_CONST_BASE(uint32_t val)  in A2XX_SQ_VS_CONST_BASE()  argument
2560 	return ((val) << A2XX_SQ_VS_CONST_BASE__SHIFT) & A2XX_SQ_VS_CONST_BASE__MASK;  in A2XX_SQ_VS_CONST_BASE()
2564 static inline uint32_t A2XX_SQ_VS_CONST_SIZE(uint32_t val)  in A2XX_SQ_VS_CONST_SIZE()  argument
2566 	return ((val) << A2XX_SQ_VS_CONST_SIZE__SHIFT) & A2XX_SQ_VS_CONST_SIZE__MASK;  in A2XX_SQ_VS_CONST_SIZE()
2572 static inline uint32_t A2XX_SQ_PS_CONST_BASE(uint32_t val)  in A2XX_SQ_PS_CONST_BASE()  argument
2574 	return ((val) << A2XX_SQ_PS_CONST_BASE__SHIFT) & A2XX_SQ_PS_CONST_BASE__MASK;  in A2XX_SQ_PS_CONST_BASE()
2578 static inline uint32_t A2XX_SQ_PS_CONST_SIZE(uint32_t val)  in A2XX_SQ_PS_CONST_SIZE()  argument
2580 	return ((val) << A2XX_SQ_PS_CONST_SIZE__SHIFT) & A2XX_SQ_PS_CONST_SIZE__MASK;  in A2XX_SQ_PS_CONST_SIZE()
2592 static inline uint32_t A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH(uint32_t val)  in A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH()  argument
2594 …return ((val) << A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__SHIFT) & A2XX_VGT_VERTEX_REUSE_…  in A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH()
2600 static inline uint32_t A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST(uint32_t val)  in A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST()  argument
2602 …return ((val) << A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__SHIFT) & A2XX_VGT_OUT_DEALLOC_CNTL_DEALLO…  in A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST()
2608 static inline uint32_t A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT(enum a2xx_rb_copy_sample_select val)  in A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT()  argument
2610 …return ((val) << A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__SHIFT) & A2XX_RB_COPY_CONTROL_COPY_SAMPL…  in A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT()
2615 static inline uint32_t A2XX_RB_COPY_CONTROL_CLEAR_MASK(uint32_t val)  in A2XX_RB_COPY_CONTROL_CLEAR_MASK()  argument
2617 	return ((val) << A2XX_RB_COPY_CONTROL_CLEAR_MASK__SHIFT) & A2XX_RB_COPY_CONTROL_CLEAR_MASK__MASK;  in A2XX_RB_COPY_CONTROL_CLEAR_MASK()
2625 static inline uint32_t A2XX_RB_COPY_DEST_PITCH(uint32_t val)  in A2XX_RB_COPY_DEST_PITCH()  argument
2627 	return ((val >> 5) << A2XX_RB_COPY_DEST_PITCH__SHIFT) & A2XX_RB_COPY_DEST_PITCH__MASK;  in A2XX_RB_COPY_DEST_PITCH()
2633 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN(enum adreno_rb_surface_endian val)  in A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN()  argument
2635 …return ((val) << A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__SHIFT) & A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__…  in A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN()
2640 static inline uint32_t A2XX_RB_COPY_DEST_INFO_FORMAT(enum a2xx_colorformatx val)  in A2XX_RB_COPY_DEST_INFO_FORMAT()  argument
2642 	return ((val) << A2XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A2XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A2XX_RB_COPY_DEST_INFO_FORMAT()
2646 static inline uint32_t A2XX_RB_COPY_DEST_INFO_SWAP(uint32_t val)  in A2XX_RB_COPY_DEST_INFO_SWAP()  argument
2648 	return ((val) << A2XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A2XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A2XX_RB_COPY_DEST_INFO_SWAP()
2652 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A2XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
2654 …return ((val) << A2XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A2XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A2XX_RB_COPY_DEST_INFO_DITHER_MODE()
2658 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_TYPE(enum a2xx_rb_dither_type val)  in A2XX_RB_COPY_DEST_INFO_DITHER_TYPE()  argument
2660 …return ((val) << A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__SHIFT) & A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__…  in A2XX_RB_COPY_DEST_INFO_DITHER_TYPE()
2670 static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_X(uint32_t val)  in A2XX_RB_COPY_DEST_OFFSET_X()  argument
2672 	return ((val) << A2XX_RB_COPY_DEST_OFFSET_X__SHIFT) & A2XX_RB_COPY_DEST_OFFSET_X__MASK;  in A2XX_RB_COPY_DEST_OFFSET_X()
2676 static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_Y(uint32_t val)  in A2XX_RB_COPY_DEST_OFFSET_Y()  argument
2678 	return ((val) << A2XX_RB_COPY_DEST_OFFSET_Y__SHIFT) & A2XX_RB_COPY_DEST_OFFSET_Y__MASK;  in A2XX_RB_COPY_DEST_OFFSET_Y()
2932 static inline uint32_t A2XX_SQ_TEX_0_TYPE(enum sq_tex_type val)  in A2XX_SQ_TEX_0_TYPE()  argument
2934 	return ((val) << A2XX_SQ_TEX_0_TYPE__SHIFT) & A2XX_SQ_TEX_0_TYPE__MASK;  in A2XX_SQ_TEX_0_TYPE()
2938 static inline uint32_t A2XX_SQ_TEX_0_SIGN_X(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_X()  argument
2940 	return ((val) << A2XX_SQ_TEX_0_SIGN_X__SHIFT) & A2XX_SQ_TEX_0_SIGN_X__MASK;  in A2XX_SQ_TEX_0_SIGN_X()
2944 static inline uint32_t A2XX_SQ_TEX_0_SIGN_Y(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_Y()  argument
2946 	return ((val) << A2XX_SQ_TEX_0_SIGN_Y__SHIFT) & A2XX_SQ_TEX_0_SIGN_Y__MASK;  in A2XX_SQ_TEX_0_SIGN_Y()
2950 static inline uint32_t A2XX_SQ_TEX_0_SIGN_Z(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_Z()  argument
2952 	return ((val) << A2XX_SQ_TEX_0_SIGN_Z__SHIFT) & A2XX_SQ_TEX_0_SIGN_Z__MASK;  in A2XX_SQ_TEX_0_SIGN_Z()
2956 static inline uint32_t A2XX_SQ_TEX_0_SIGN_W(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_W()  argument
2958 	return ((val) << A2XX_SQ_TEX_0_SIGN_W__SHIFT) & A2XX_SQ_TEX_0_SIGN_W__MASK;  in A2XX_SQ_TEX_0_SIGN_W()
2962 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_X(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_X()  argument
2964 	return ((val) << A2XX_SQ_TEX_0_CLAMP_X__SHIFT) & A2XX_SQ_TEX_0_CLAMP_X__MASK;  in A2XX_SQ_TEX_0_CLAMP_X()
2968 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Y(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_Y()  argument
2970 	return ((val) << A2XX_SQ_TEX_0_CLAMP_Y__SHIFT) & A2XX_SQ_TEX_0_CLAMP_Y__MASK;  in A2XX_SQ_TEX_0_CLAMP_Y()
2974 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Z(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_Z()  argument
2976 	return ((val) << A2XX_SQ_TEX_0_CLAMP_Z__SHIFT) & A2XX_SQ_TEX_0_CLAMP_Z__MASK;  in A2XX_SQ_TEX_0_CLAMP_Z()
2980 static inline uint32_t A2XX_SQ_TEX_0_PITCH(uint32_t val)  in A2XX_SQ_TEX_0_PITCH()  argument
2982 	return ((val >> 5) << A2XX_SQ_TEX_0_PITCH__SHIFT) & A2XX_SQ_TEX_0_PITCH__MASK;  in A2XX_SQ_TEX_0_PITCH()
2989 static inline uint32_t A2XX_SQ_TEX_1_FORMAT(enum a2xx_sq_surfaceformat val)  in A2XX_SQ_TEX_1_FORMAT()  argument
2991 	return ((val) << A2XX_SQ_TEX_1_FORMAT__SHIFT) & A2XX_SQ_TEX_1_FORMAT__MASK;  in A2XX_SQ_TEX_1_FORMAT()
2995 static inline uint32_t A2XX_SQ_TEX_1_ENDIANNESS(enum sq_tex_endian val)  in A2XX_SQ_TEX_1_ENDIANNESS()  argument
2997 	return ((val) << A2XX_SQ_TEX_1_ENDIANNESS__SHIFT) & A2XX_SQ_TEX_1_ENDIANNESS__MASK;  in A2XX_SQ_TEX_1_ENDIANNESS()
3001 static inline uint32_t A2XX_SQ_TEX_1_REQUEST_SIZE(uint32_t val)  in A2XX_SQ_TEX_1_REQUEST_SIZE()  argument
3003 	return ((val) << A2XX_SQ_TEX_1_REQUEST_SIZE__SHIFT) & A2XX_SQ_TEX_1_REQUEST_SIZE__MASK;  in A2XX_SQ_TEX_1_REQUEST_SIZE()
3008 static inline uint32_t A2XX_SQ_TEX_1_CLAMP_POLICY(enum sq_tex_clamp_policy val)  in A2XX_SQ_TEX_1_CLAMP_POLICY()  argument
3010 	return ((val) << A2XX_SQ_TEX_1_CLAMP_POLICY__SHIFT) & A2XX_SQ_TEX_1_CLAMP_POLICY__MASK;  in A2XX_SQ_TEX_1_CLAMP_POLICY()
3014 static inline uint32_t A2XX_SQ_TEX_1_BASE_ADDRESS(uint32_t val)  in A2XX_SQ_TEX_1_BASE_ADDRESS()  argument
3016 	return ((val >> 12) << A2XX_SQ_TEX_1_BASE_ADDRESS__SHIFT) & A2XX_SQ_TEX_1_BASE_ADDRESS__MASK;  in A2XX_SQ_TEX_1_BASE_ADDRESS()
3022 static inline uint32_t A2XX_SQ_TEX_2_WIDTH(uint32_t val)  in A2XX_SQ_TEX_2_WIDTH()  argument
3024 	return ((val) << A2XX_SQ_TEX_2_WIDTH__SHIFT) & A2XX_SQ_TEX_2_WIDTH__MASK;  in A2XX_SQ_TEX_2_WIDTH()
3028 static inline uint32_t A2XX_SQ_TEX_2_HEIGHT(uint32_t val)  in A2XX_SQ_TEX_2_HEIGHT()  argument
3030 	return ((val) << A2XX_SQ_TEX_2_HEIGHT__SHIFT) & A2XX_SQ_TEX_2_HEIGHT__MASK;  in A2XX_SQ_TEX_2_HEIGHT()
3034 static inline uint32_t A2XX_SQ_TEX_2_DEPTH(uint32_t val)  in A2XX_SQ_TEX_2_DEPTH()  argument
3036 	return ((val) << A2XX_SQ_TEX_2_DEPTH__SHIFT) & A2XX_SQ_TEX_2_DEPTH__MASK;  in A2XX_SQ_TEX_2_DEPTH()
3042 static inline uint32_t A2XX_SQ_TEX_3_NUM_FORMAT(enum sq_tex_num_format val)  in A2XX_SQ_TEX_3_NUM_FORMAT()  argument
3044 	return ((val) << A2XX_SQ_TEX_3_NUM_FORMAT__SHIFT) & A2XX_SQ_TEX_3_NUM_FORMAT__MASK;  in A2XX_SQ_TEX_3_NUM_FORMAT()
3048 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_X(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_X()  argument
3050 	return ((val) << A2XX_SQ_TEX_3_SWIZ_X__SHIFT) & A2XX_SQ_TEX_3_SWIZ_X__MASK;  in A2XX_SQ_TEX_3_SWIZ_X()
3054 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Y(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_Y()  argument
3056 	return ((val) << A2XX_SQ_TEX_3_SWIZ_Y__SHIFT) & A2XX_SQ_TEX_3_SWIZ_Y__MASK;  in A2XX_SQ_TEX_3_SWIZ_Y()
3060 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Z(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_Z()  argument
3062 	return ((val) << A2XX_SQ_TEX_3_SWIZ_Z__SHIFT) & A2XX_SQ_TEX_3_SWIZ_Z__MASK;  in A2XX_SQ_TEX_3_SWIZ_Z()
3066 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_W(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_W()  argument
3068 	return ((val) << A2XX_SQ_TEX_3_SWIZ_W__SHIFT) & A2XX_SQ_TEX_3_SWIZ_W__MASK;  in A2XX_SQ_TEX_3_SWIZ_W()
3072 static inline uint32_t A2XX_SQ_TEX_3_EXP_ADJUST(int32_t val)  in A2XX_SQ_TEX_3_EXP_ADJUST()  argument
3074 	return ((val) << A2XX_SQ_TEX_3_EXP_ADJUST__SHIFT) & A2XX_SQ_TEX_3_EXP_ADJUST__MASK;  in A2XX_SQ_TEX_3_EXP_ADJUST()
3078 static inline uint32_t A2XX_SQ_TEX_3_XY_MAG_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_XY_MAG_FILTER()  argument
3080 	return ((val) << A2XX_SQ_TEX_3_XY_MAG_FILTER__SHIFT) & A2XX_SQ_TEX_3_XY_MAG_FILTER__MASK;  in A2XX_SQ_TEX_3_XY_MAG_FILTER()
3084 static inline uint32_t A2XX_SQ_TEX_3_XY_MIN_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_XY_MIN_FILTER()  argument
3086 	return ((val) << A2XX_SQ_TEX_3_XY_MIN_FILTER__SHIFT) & A2XX_SQ_TEX_3_XY_MIN_FILTER__MASK;  in A2XX_SQ_TEX_3_XY_MIN_FILTER()
3090 static inline uint32_t A2XX_SQ_TEX_3_MIP_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_MIP_FILTER()  argument
3092 	return ((val) << A2XX_SQ_TEX_3_MIP_FILTER__SHIFT) & A2XX_SQ_TEX_3_MIP_FILTER__MASK;  in A2XX_SQ_TEX_3_MIP_FILTER()
3096 static inline uint32_t A2XX_SQ_TEX_3_ANISO_FILTER(enum sq_tex_aniso_filter val)  in A2XX_SQ_TEX_3_ANISO_FILTER()  argument
3098 	return ((val) << A2XX_SQ_TEX_3_ANISO_FILTER__SHIFT) & A2XX_SQ_TEX_3_ANISO_FILTER__MASK;  in A2XX_SQ_TEX_3_ANISO_FILTER()
3102 static inline uint32_t A2XX_SQ_TEX_3_BORDER_SIZE(uint32_t val)  in A2XX_SQ_TEX_3_BORDER_SIZE()  argument
3104 	return ((val) << A2XX_SQ_TEX_3_BORDER_SIZE__SHIFT) & A2XX_SQ_TEX_3_BORDER_SIZE__MASK;  in A2XX_SQ_TEX_3_BORDER_SIZE()
3110 static inline uint32_t A2XX_SQ_TEX_4_VOL_MAG_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_4_VOL_MAG_FILTER()  argument
3112 	return ((val) << A2XX_SQ_TEX_4_VOL_MAG_FILTER__SHIFT) & A2XX_SQ_TEX_4_VOL_MAG_FILTER__MASK;  in A2XX_SQ_TEX_4_VOL_MAG_FILTER()
3116 static inline uint32_t A2XX_SQ_TEX_4_VOL_MIN_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_4_VOL_MIN_FILTER()  argument
3118 	return ((val) << A2XX_SQ_TEX_4_VOL_MIN_FILTER__SHIFT) & A2XX_SQ_TEX_4_VOL_MIN_FILTER__MASK;  in A2XX_SQ_TEX_4_VOL_MIN_FILTER()
3122 static inline uint32_t A2XX_SQ_TEX_4_MIP_MIN_LEVEL(uint32_t val)  in A2XX_SQ_TEX_4_MIP_MIN_LEVEL()  argument
3124 	return ((val) << A2XX_SQ_TEX_4_MIP_MIN_LEVEL__SHIFT) & A2XX_SQ_TEX_4_MIP_MIN_LEVEL__MASK;  in A2XX_SQ_TEX_4_MIP_MIN_LEVEL()
3128 static inline uint32_t A2XX_SQ_TEX_4_MIP_MAX_LEVEL(uint32_t val)  in A2XX_SQ_TEX_4_MIP_MAX_LEVEL()  argument
3130 	return ((val) << A2XX_SQ_TEX_4_MIP_MAX_LEVEL__SHIFT) & A2XX_SQ_TEX_4_MIP_MAX_LEVEL__MASK;  in A2XX_SQ_TEX_4_MIP_MAX_LEVEL()
3136 static inline uint32_t A2XX_SQ_TEX_4_LOD_BIAS(float val)  in A2XX_SQ_TEX_4_LOD_BIAS()  argument
3138 	return ((((int32_t)(val * 32.0))) << A2XX_SQ_TEX_4_LOD_BIAS__SHIFT) & A2XX_SQ_TEX_4_LOD_BIAS__MASK;  in A2XX_SQ_TEX_4_LOD_BIAS()
3142 static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H(uint32_t val)  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H()  argument
3144 	return ((val) << A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__SHIFT) & A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__MASK;  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H()
3148 static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V(uint32_t val)  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V()  argument
3150 	return ((val) << A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__SHIFT) & A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__MASK;  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V()
3156 static inline uint32_t A2XX_SQ_TEX_5_BORDER_COLOR(enum sq_tex_border_color val)  in A2XX_SQ_TEX_5_BORDER_COLOR()  argument
3158 	return ((val) << A2XX_SQ_TEX_5_BORDER_COLOR__SHIFT) & A2XX_SQ_TEX_5_BORDER_COLOR__MASK;  in A2XX_SQ_TEX_5_BORDER_COLOR()
3163 static inline uint32_t A2XX_SQ_TEX_5_TRI_CLAMP(uint32_t val)  in A2XX_SQ_TEX_5_TRI_CLAMP()  argument
3165 	return ((val) << A2XX_SQ_TEX_5_TRI_CLAMP__SHIFT) & A2XX_SQ_TEX_5_TRI_CLAMP__MASK;  in A2XX_SQ_TEX_5_TRI_CLAMP()
3169 static inline uint32_t A2XX_SQ_TEX_5_ANISO_BIAS(float val)  in A2XX_SQ_TEX_5_ANISO_BIAS()  argument
3171 …return ((((int32_t)(val * 1.0))) << A2XX_SQ_TEX_5_ANISO_BIAS__SHIFT) & A2XX_SQ_TEX_5_ANISO_BIAS__M…  in A2XX_SQ_TEX_5_ANISO_BIAS()
3175 static inline uint32_t A2XX_SQ_TEX_5_DIMENSION(enum sq_tex_dimension val)  in A2XX_SQ_TEX_5_DIMENSION()  argument
3177 	return ((val) << A2XX_SQ_TEX_5_DIMENSION__SHIFT) & A2XX_SQ_TEX_5_DIMENSION__MASK;  in A2XX_SQ_TEX_5_DIMENSION()
3182 static inline uint32_t A2XX_SQ_TEX_5_MIP_ADDRESS(uint32_t val)  in A2XX_SQ_TEX_5_MIP_ADDRESS()  argument
3184 	return ((val >> 12) << A2XX_SQ_TEX_5_MIP_ADDRESS__SHIFT) & A2XX_SQ_TEX_5_MIP_ADDRESS__MASK;  in A2XX_SQ_TEX_5_MIP_ADDRESS()