127 	unsigned int	(*top_read)(struct meson_dw_hdmi *dw_hdmi,
129 	void		(*top_write)(struct meson_dw_hdmi *dw_hdmi,
131 	unsigned int	(*dwc_read)(struct meson_dw_hdmi *dw_hdmi,
133 	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
152 	struct dw_hdmi *hdmi;
160 static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_is_compatible()  argument
163 	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);  in dw_hdmi_is_compatible()
168 static unsigned int dw_hdmi_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_read()  argument
177 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
178 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
181 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
182 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
189 static unsigned int dw_hdmi_g12a_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_read()  argument
192 	return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_read()
195 static inline void dw_hdmi_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write()  argument
203 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
204 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
207 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_write()
212 static inline void dw_hdmi_g12a_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_write()  argument
215 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_write()
219 static inline void dw_hdmi_top_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write_bits()  argument
224 	unsigned int data = dw_hdmi->data->top_read(dw_hdmi, addr);  in dw_hdmi_top_write_bits()
229 	dw_hdmi->data->top_write(dw_hdmi, addr, data);  in dw_hdmi_top_write_bits()
232 static unsigned int dw_hdmi_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_read()  argument
241 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
242 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
245 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
246 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
253 static unsigned int dw_hdmi_g12a_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_read()  argument
256 	return readb(dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_read()
259 static inline void dw_hdmi_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write()  argument
267 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
268 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
271 	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_write()
276 static inline void dw_hdmi_g12a_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_write()  argument
279 	writeb(data, dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_write()
283 static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write_bits()  argument
288 	unsigned int data = dw_hdmi->data->dwc_read(dw_hdmi, addr);  in dw_hdmi_dwc_write_bits()
293 	dw_hdmi->data->dwc_write(dw_hdmi, addr, data);  in dw_hdmi_dwc_write_bits()
299 static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,  in meson_hdmi_phy_setup_mode()  argument
302 	struct meson_drm *priv = dw_hdmi->priv;  in meson_hdmi_phy_setup_mode()
306 	if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)  in meson_hdmi_phy_setup_mode()
309 	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||  in meson_hdmi_phy_setup_mode()
310 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi")) {  in meson_hdmi_phy_setup_mode()
328 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
343 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
364 static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)  in meson_dw_hdmi_phy_reset()  argument
366 	struct meson_drm *priv = dw_hdmi->priv;  in meson_dw_hdmi_phy_reset()
379 static void dw_hdmi_set_vclk(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_set_vclk()  argument
382 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_set_vclk()
392 	if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)  in dw_hdmi_set_vclk()
413 	    dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)  in dw_hdmi_set_vclk()
429 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,  in dw_hdmi_phy_init()
433 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_init()  local
434 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_init()
448 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_SW_RESET,  0);  in dw_hdmi_phy_init()
451 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,  in dw_hdmi_phy_init()
455 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,  in dw_hdmi_phy_init()
459 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));  in dw_hdmi_phy_init()
463 	    dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_YUV8_1X24) {  in dw_hdmi_phy_init()
464 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
466 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
469 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
471 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
476 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);  in dw_hdmi_phy_init()
478 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x2);  in dw_hdmi_phy_init()
481 	meson_hdmi_phy_setup_mode(dw_hdmi, mode);  in dw_hdmi_phy_init()
488 	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||  in dw_hdmi_phy_init()
489 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") ||  in dw_hdmi_phy_init()
490 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))  in dw_hdmi_phy_init()
505 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
506 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
507 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
542 static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,  in dw_hdmi_phy_disable()
545 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_disable()  local
546 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_disable()
553 static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_read_hpd()
556 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_read_hpd()  local
558 	return !!dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_STAT0) ?  in dw_hdmi_read_hpd()
562 static void dw_hdmi_setup_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_setup_hpd()
565 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_setup_hpd()  local
568 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_HPD_FILTER,  in dw_hdmi_setup_hpd()
572 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,  in dw_hdmi_setup_hpd()
576 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_INTR_MASKN,  in dw_hdmi_setup_hpd()
590 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_irq()  local
593 	stat = dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_INTR_STAT);  in dw_hdmi_top_irq()
594 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, stat);  in dw_hdmi_top_irq()
598 		dw_hdmi->irq_stat = stat;  in dw_hdmi_top_irq()
614 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_thread_irq()  local
615 	u32 stat = dw_hdmi->irq_stat;  in dw_hdmi_top_thread_irq()
624 		dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,  in dw_hdmi_top_thread_irq()
627 		drm_helper_hpd_irq_event(dw_hdmi->encoder.dev);  in dw_hdmi_top_thread_irq()
634 dw_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,  in dw_hdmi_mode_valid()
638 	struct meson_dw_hdmi *dw_hdmi = data;  in dw_hdmi_mode_valid()  local
639 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_mode_valid()
698 	dev_dbg(dw_hdmi->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n",  in dw_hdmi_mode_valid()
756 	struct meson_dw_hdmi *dw_hdmi = bridge_to_meson_dw_hdmi(bridge);  in meson_venc_hdmi_encoder_atomic_check()  local
758 	dw_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format;  in meson_venc_hdmi_encoder_atomic_check()
760 	DRM_DEBUG_DRIVER("output_bus_fmt %lx\n", dw_hdmi->output_bus_fmt);  in meson_venc_hdmi_encoder_atomic_check()
767 	struct meson_dw_hdmi *dw_hdmi = bridge_to_meson_dw_hdmi(bridge);  in meson_venc_hdmi_encoder_disable()  local
768 	struct meson_drm *priv = dw_hdmi->priv;  in meson_venc_hdmi_encoder_disable()
781 	struct meson_dw_hdmi *dw_hdmi = bridge_to_meson_dw_hdmi(bridge);  in meson_venc_hdmi_encoder_enable()  local
782 	struct meson_drm *priv = dw_hdmi->priv;  in meson_venc_hdmi_encoder_enable()
796 	struct meson_dw_hdmi *dw_hdmi = bridge_to_meson_dw_hdmi(bridge);  in meson_venc_hdmi_encoder_mode_set()  local
797 	struct meson_drm *priv = dw_hdmi->priv;  in meson_venc_hdmi_encoder_mode_set()
804 	if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) {  in meson_venc_hdmi_encoder_mode_set()
813 	dw_hdmi_set_vclk(dw_hdmi, mode);  in meson_venc_hdmi_encoder_mode_set()
815 	if (dw_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24)  in meson_venc_hdmi_encoder_mode_set()
840 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_read()  local
842 	*result = dw_hdmi->data->dwc_read(dw_hdmi, reg);  in meson_dw_hdmi_reg_read()
851 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_write()  local
853 	dw_hdmi->data->dwc_write(dw_hdmi, reg, val);  in meson_dw_hdmi_reg_write()