Lines Matching refs:raw_reg_write
2059 raw_reg_write(regs, DEIER, de_ier & ~DE_MASTER_IRQ_CONTROL); in ilk_irq_handler()
2068 raw_reg_write(regs, SDEIER, 0); in ilk_irq_handler()
2075 raw_reg_write(regs, GTIIR, gt_iir); in ilk_irq_handler()
2085 raw_reg_write(regs, DEIIR, de_iir); in ilk_irq_handler()
2096 raw_reg_write(regs, GEN6_PMIIR, pm_iir); in ilk_irq_handler()
2102 raw_reg_write(regs, DEIER, de_ier); in ilk_irq_handler()
2104 raw_reg_write(regs, SDEIER, sde_ier); in ilk_irq_handler()
2379 raw_reg_write(regs, GEN8_MASTER_IRQ, 0); in gen8_master_intr_disable()
2392 raw_reg_write(regs, GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL); in gen8_master_intr_enable()
2436 raw_reg_write(regs, GEN11_GU_MISC_IIR, iir); in gen11_gu_misc_irq_ack()
2450 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0); in gen11_master_intr_disable()
2463 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ); in gen11_master_intr_enable()
2477 raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, 0x0); in gen11_display_irq_handler()
2479 raw_reg_write(regs, GEN11_DISPLAY_INT_CTL, in gen11_display_irq_handler()
2532 raw_reg_write(regs, DG1_MSTR_UNIT_INTR, 0); in dg1_master_intr_disable_and_ack()
2539 raw_reg_write(regs, DG1_MSTR_UNIT_INTR, val); in dg1_master_intr_disable_and_ack()
2550 raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, val); in dg1_master_intr_disable_and_ack()
2557 raw_reg_write(regs, DG1_MSTR_UNIT_INTR, DG1_MSTR_IRQ); in dg1_master_intr_enable()