Lines Matching refs:INTEL_INFO
1291 #define INTEL_INFO(dev_priv) (&(dev_priv)->__info) macro
1295 #define INTEL_GEN(dev_priv) (INTEL_INFO(dev_priv)->gen)
1308 (!!(INTEL_INFO(dev_priv)->gen_mask & INTEL_GEN_MASK((s), (e))))
1312 INTEL_INFO(dev_priv)->gen == (n))
1314 #define HAS_DSB(dev_priv) (INTEL_INFO(dev_priv)->display.has_dsb)
1386 #define IS_MOBILE(dev_priv) (INTEL_INFO(dev_priv)->is_mobile)
1387 #define IS_DGFX(dev_priv) (INTEL_INFO(dev_priv)->is_dgfx)
1409 INTEL_INFO(dev_priv)->gt == 1)
1433 INTEL_INFO(dev_priv)->gt == 3)
1437 INTEL_INFO(dev_priv)->gt == 3)
1439 INTEL_INFO(dev_priv)->gt == 1)
1452 INTEL_INFO(dev_priv)->gt == 2)
1454 INTEL_INFO(dev_priv)->gt == 3)
1456 INTEL_INFO(dev_priv)->gt == 4)
1458 INTEL_INFO(dev_priv)->gt == 2)
1460 INTEL_INFO(dev_priv)->gt == 3)
1466 INTEL_INFO(dev_priv)->gt == 2)
1468 INTEL_INFO(dev_priv)->gt == 3)
1475 INTEL_INFO(dev_priv)->gt == 2)
1615 #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp)
1639 #define HAS_LLC(dev_priv) (INTEL_INFO(dev_priv)->has_llc)
1640 #define HAS_SNOOP(dev_priv) (INTEL_INFO(dev_priv)->has_snoop)
1646 #define HWS_NEEDS_PHYSICAL(dev_priv) (INTEL_INFO(dev_priv)->hws_needs_physical)
1649 (INTEL_INFO(dev_priv)->has_logical_ring_contexts)
1651 (INTEL_INFO(dev_priv)->has_logical_ring_elsq)
1653 (INTEL_INFO(dev_priv)->has_logical_ring_preemption)
1655 #define HAS_MASTER_UNIT_IRQ(dev_priv) (INTEL_INFO(dev_priv)->has_master_unit_irq)
1659 #define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_type)
1667 ((sizes) & ~INTEL_INFO(dev_priv)->page_sizes) == 0; \
1670 #define HAS_OVERLAY(dev_priv) (INTEL_INFO(dev_priv)->display.has_overlay)
1672 (INTEL_INFO(dev_priv)->display.overlay_needs_physical)
1697 #define SUPPORTS_TV(dev_priv) (INTEL_INFO(dev_priv)->display.supports_tv)
1698 #define I915_HAS_HOTPLUG(dev_priv) (INTEL_INFO(dev_priv)->display.has_hotplug)
1701 #define HAS_FBC(dev_priv) (INTEL_INFO(dev_priv)->display.has_fbc)
1706 #define HAS_DP_MST(dev_priv) (INTEL_INFO(dev_priv)->display.has_dp_mst)
1708 #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
1709 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
1710 #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
1712 (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
1714 #define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) …
1716 #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
1717 #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
1720 #define HAS_RPS(dev_priv) (INTEL_INFO(dev_priv)->has_rps)
1722 #define HAS_CSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_csr)
1724 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
1725 #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
1727 #define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
1729 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
1732 #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc)
1734 #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu)
1736 #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs)
1739 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
1744 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
1751 #define INTEL_NUM_PIPES(dev_priv) (hweight8(INTEL_INFO(dev_priv)->pipe_mask))
1753 #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->pipe_mask != 0)
1966 return (struct intel_device_info *)INTEL_INFO(dev_priv); in mkwrite_device_info()