Lines Matching refs:seq_printf

62 	seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(i915));  in i915_capabilities()
134 seq_printf(m, "%pK: %c%c%c %8zdKiB %02x %02x %s%s%s", in i915_debugfs_describe_obj()
146 seq_printf(m, " (name: %d)", obj->base.name); in i915_debugfs_describe_obj()
158 seq_printf(m, " (%sgtt offset: %08llx, size: %08llx, pages: %s", in i915_debugfs_describe_obj()
169 seq_printf(m, ", partial [%08llx+%x]", in i915_debugfs_describe_obj()
175 seq_printf(m, ", rotated [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]", in i915_debugfs_describe_obj()
187 seq_printf(m, ", remapped [(%ux%u, stride=%u, offset=%u), (%ux%u, stride=%u, offset=%u)]", in i915_debugfs_describe_obj()
204 seq_printf(m, " , fence: %d", vma->fence->id); in i915_debugfs_describe_obj()
211 seq_printf(m, " (pinned x %d)", pin_count); in i915_debugfs_describe_obj()
213 seq_printf(m, " (stolen: %08llx)", obj->stolen->start); in i915_debugfs_describe_obj()
215 seq_printf(m, " (fb)"); in i915_debugfs_describe_obj()
219 seq_printf(m, " (%s)", engine->name); in i915_debugfs_describe_obj()
290 seq_printf(m, "%s: %lu objects, %llu bytes (%llu active, %llu inactive, %llu closed)\n", \
367 seq_printf(m, "%u shrinkable [%u free] objects, %llu bytes\n", in i915_gem_object_info()
372 seq_printf(m, "%s: total:%pa, available:%pa bytes\n", in i915_gem_object_info()
394 seq_printf(m, "Pipe %c power disabled\n", in gen8_display_interrupt_info()
398 seq_printf(m, "Pipe %c IMR:\t%08x\n", in gen8_display_interrupt_info()
401 seq_printf(m, "Pipe %c IIR:\t%08x\n", in gen8_display_interrupt_info()
404 seq_printf(m, "Pipe %c IER:\t%08x\n", in gen8_display_interrupt_info()
411 seq_printf(m, "Display Engine port interrupt mask:\t%08x\n", in gen8_display_interrupt_info()
413 seq_printf(m, "Display Engine port interrupt identity:\t%08x\n", in gen8_display_interrupt_info()
415 seq_printf(m, "Display Engine port interrupt enable:\t%08x\n", in gen8_display_interrupt_info()
418 seq_printf(m, "Display Engine misc interrupt mask:\t%08x\n", in gen8_display_interrupt_info()
420 seq_printf(m, "Display Engine misc interrupt identity:\t%08x\n", in gen8_display_interrupt_info()
422 seq_printf(m, "Display Engine misc interrupt enable:\t%08x\n", in gen8_display_interrupt_info()
425 seq_printf(m, "PCU interrupt mask:\t%08x\n", in gen8_display_interrupt_info()
427 seq_printf(m, "PCU interrupt identity:\t%08x\n", in gen8_display_interrupt_info()
429 seq_printf(m, "PCU interrupt enable:\t%08x\n", in gen8_display_interrupt_info()
445 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
448 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
450 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
452 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
454 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
463 seq_printf(m, "Pipe %c power disabled\n", in i915_interrupt_info()
468 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
476 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
478 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
480 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
485 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
487 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
489 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
493 seq_printf(m, "PCU interrupt mask:\t%08x\n", in i915_interrupt_info()
495 seq_printf(m, "PCU interrupt identity:\t%08x\n", in i915_interrupt_info()
497 seq_printf(m, "PCU interrupt enable:\t%08x\n", in i915_interrupt_info()
501 seq_printf(m, "Master Unit Interrupt Control: %08x\n", in i915_interrupt_info()
504 seq_printf(m, "Master Interrupt Control: %08x\n", in i915_interrupt_info()
507 seq_printf(m, "Render/Copy Intr Enable: %08x\n", in i915_interrupt_info()
509 seq_printf(m, "VCS/VECS Intr Enable: %08x\n", in i915_interrupt_info()
511 seq_printf(m, "GUC/SG Intr Enable:\t %08x\n", in i915_interrupt_info()
513 seq_printf(m, "GPM/WGBOXPERF Intr Enable: %08x\n", in i915_interrupt_info()
515 seq_printf(m, "Crypto Intr Enable:\t %08x\n", in i915_interrupt_info()
517 seq_printf(m, "GUnit/CSME Intr Enable:\t %08x\n", in i915_interrupt_info()
520 seq_printf(m, "Display Interrupt Control:\t%08x\n", in i915_interrupt_info()
525 seq_printf(m, "Master Interrupt Control:\t%08x\n", in i915_interrupt_info()
529 seq_printf(m, "GT Interrupt IMR %d:\t%08x\n", in i915_interrupt_info()
531 seq_printf(m, "GT Interrupt IIR %d:\t%08x\n", in i915_interrupt_info()
533 seq_printf(m, "GT Interrupt IER %d:\t%08x\n", in i915_interrupt_info()
541 seq_printf(m, "Display IER:\t%08x\n", in i915_interrupt_info()
543 seq_printf(m, "Display IIR:\t%08x\n", in i915_interrupt_info()
545 seq_printf(m, "Display IIR_RW:\t%08x\n", in i915_interrupt_info()
547 seq_printf(m, "Display IMR:\t%08x\n", in i915_interrupt_info()
556 seq_printf(m, "Pipe %c power disabled\n", in i915_interrupt_info()
561 seq_printf(m, "Pipe %c stat:\t%08x\n", in i915_interrupt_info()
567 seq_printf(m, "Master IER:\t%08x\n", in i915_interrupt_info()
570 seq_printf(m, "Render IER:\t%08x\n", in i915_interrupt_info()
572 seq_printf(m, "Render IIR:\t%08x\n", in i915_interrupt_info()
574 seq_printf(m, "Render IMR:\t%08x\n", in i915_interrupt_info()
577 seq_printf(m, "PM IER:\t\t%08x\n", in i915_interrupt_info()
579 seq_printf(m, "PM IIR:\t\t%08x\n", in i915_interrupt_info()
581 seq_printf(m, "PM IMR:\t\t%08x\n", in i915_interrupt_info()
585 seq_printf(m, "Port hotplug:\t%08x\n", in i915_interrupt_info()
587 seq_printf(m, "DPFLIPSTAT:\t%08x\n", in i915_interrupt_info()
589 seq_printf(m, "DPINVGTT:\t%08x\n", in i915_interrupt_info()
594 seq_printf(m, "Interrupt enable: %08x\n", in i915_interrupt_info()
596 seq_printf(m, "Interrupt identity: %08x\n", in i915_interrupt_info()
598 seq_printf(m, "Interrupt mask: %08x\n", in i915_interrupt_info()
601 seq_printf(m, "Pipe %c stat: %08x\n", in i915_interrupt_info()
605 seq_printf(m, "North Display Interrupt enable: %08x\n", in i915_interrupt_info()
607 seq_printf(m, "North Display Interrupt identity: %08x\n", in i915_interrupt_info()
609 seq_printf(m, "North Display Interrupt mask: %08x\n", in i915_interrupt_info()
611 seq_printf(m, "South Display Interrupt enable: %08x\n", in i915_interrupt_info()
613 seq_printf(m, "South Display Interrupt identity: %08x\n", in i915_interrupt_info()
615 seq_printf(m, "South Display Interrupt mask: %08x\n", in i915_interrupt_info()
617 seq_printf(m, "Graphics Interrupt enable: %08x\n", in i915_interrupt_info()
619 seq_printf(m, "Graphics Interrupt identity: %08x\n", in i915_interrupt_info()
621 seq_printf(m, "Graphics Interrupt mask: %08x\n", in i915_interrupt_info()
626 seq_printf(m, "RCS Intr Mask:\t %08x\n", in i915_interrupt_info()
628 seq_printf(m, "BCS Intr Mask:\t %08x\n", in i915_interrupt_info()
630 seq_printf(m, "VCS0/VCS1 Intr Mask:\t %08x\n", in i915_interrupt_info()
632 seq_printf(m, "VCS2/VCS3 Intr Mask:\t %08x\n", in i915_interrupt_info()
634 seq_printf(m, "VECS0/VECS1 Intr Mask:\t %08x\n", in i915_interrupt_info()
636 seq_printf(m, "GUC/SG Intr Mask:\t %08x\n", in i915_interrupt_info()
638 seq_printf(m, "GPM/WGBOXPERF Intr Mask: %08x\n", in i915_interrupt_info()
640 seq_printf(m, "Crypto Intr Mask:\t %08x\n", in i915_interrupt_info()
642 seq_printf(m, "Gunit/CSME Intr Mask:\t %08x\n", in i915_interrupt_info()
647 seq_printf(m, in i915_interrupt_info()
663 seq_printf(m, "Total fences = %d\n", i915->ggtt.num_fences); in i915_gem_fence_regs_info()
670 seq_printf(m, "Fence %d, pin count = %d, object = ", in i915_gem_fence_regs_info()
797 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf); in i915_frequency_info()
798 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f); in i915_frequency_info()
799 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >> in i915_frequency_info()
801 seq_printf(m, "Current P-state: %d\n", in i915_frequency_info()
807 seq_printf(m, "Video Turbo Mode: %s\n", in i915_frequency_info()
809 seq_printf(m, "HW control enabled: %s\n", in i915_frequency_info()
811 seq_printf(m, "SW control enabled: %s\n", in i915_frequency_info()
819 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts); in i915_frequency_info()
820 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq); in i915_frequency_info()
822 seq_printf(m, "actual GPU freq: %d MHz\n", in i915_frequency_info()
825 seq_printf(m, "current GPU freq: %d MHz\n", in i915_frequency_info()
828 seq_printf(m, "max GPU freq: %d MHz\n", in i915_frequency_info()
831 seq_printf(m, "min GPU freq: %d MHz\n", in i915_frequency_info()
834 seq_printf(m, "idle GPU freq: %d MHz\n", in i915_frequency_info()
837 seq_printf(m, in i915_frequency_info()
912 seq_printf(m, "Video Turbo Mode: %s\n", in i915_frequency_info()
914 seq_printf(m, "HW control enabled: %s\n", in i915_frequency_info()
916 seq_printf(m, "SW control enabled: %s\n", in i915_frequency_info()
920 seq_printf(m, "PM IER=0x%08x IMR=0x%08x, MASK=0x%08x\n", in i915_frequency_info()
923 seq_printf(m, "PM ISR=0x%08x IIR=0x%08x\n", in i915_frequency_info()
925 seq_printf(m, "pm_intrmsk_mbz: 0x%08x\n", in i915_frequency_info()
927 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status); in i915_frequency_info()
928 seq_printf(m, "Render p-state ratio: %d\n", in i915_frequency_info()
930 seq_printf(m, "Render p-state VID: %d\n", in i915_frequency_info()
932 seq_printf(m, "Render p-state limit: %d\n", in i915_frequency_info()
934 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat); in i915_frequency_info()
935 seq_printf(m, "RPMODECTL: 0x%08x\n", rpmodectl); in i915_frequency_info()
936 seq_printf(m, "RPINCLIMIT: 0x%08x\n", rpinclimit); in i915_frequency_info()
937 seq_printf(m, "RPDECLIMIT: 0x%08x\n", rpdeclimit); in i915_frequency_info()
938 seq_printf(m, "RPNSWREQ: %dMHz\n", reqf); in i915_frequency_info()
939 seq_printf(m, "CAGF: %dMHz\n", cagf); in i915_frequency_info()
940 seq_printf(m, "RP CUR UP EI: %d (%dns)\n", in i915_frequency_info()
943 seq_printf(m, "RP CUR UP: %d (%dun)\n", in i915_frequency_info()
946 seq_printf(m, "RP PREV UP: %d (%dns)\n", in i915_frequency_info()
949 seq_printf(m, "Up threshold: %d%%\n", in i915_frequency_info()
952 seq_printf(m, "RP CUR DOWN EI: %d (%dns)\n", in i915_frequency_info()
956 seq_printf(m, "RP CUR DOWN: %d (%dns)\n", in i915_frequency_info()
960 seq_printf(m, "RP PREV DOWN: %d (%dns)\n", in i915_frequency_info()
964 seq_printf(m, "Down threshold: %d%%\n", in i915_frequency_info()
971 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n", in i915_frequency_info()
977 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n", in i915_frequency_info()
984 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n", in i915_frequency_info()
986 seq_printf(m, "Max overclocked frequency: %dMHz\n", in i915_frequency_info()
989 seq_printf(m, "Current freq: %d MHz\n", in i915_frequency_info()
991 seq_printf(m, "Actual freq: %d MHz\n", cagf); in i915_frequency_info()
992 seq_printf(m, "Idle freq: %d MHz\n", in i915_frequency_info()
994 seq_printf(m, "Min freq: %d MHz\n", in i915_frequency_info()
996 seq_printf(m, "Boost freq: %d MHz\n", in i915_frequency_info()
998 seq_printf(m, "Max freq: %d MHz\n", in i915_frequency_info()
1000 seq_printf(m, in i915_frequency_info()
1007 seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk); in i915_frequency_info()
1008 seq_printf(m, "Max CD clock frequency: %d kHz\n", dev_priv->max_cdclk_freq); in i915_frequency_info()
1009 seq_printf(m, "Max pixel clock frequency: %d kHz\n", dev_priv->max_dotclk_freq); in i915_frequency_info()
1042 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n", in i915_ring_freq_table()
1058 seq_printf(m, " (ringbuffer, space: %d, head: %u, tail: %u, emit: %u)", in describe_ctx_ring()
1083 seq_printf(m, "(%s [%d]) ", in i915_context_status()
1099 seq_printf(m, "%s: ", ce->engine->name); in i915_context_status()
1150 seq_printf(m, "bit6 swizzle for X-tiling = %s\n", in i915_swizzle_info()
1152 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n", in i915_swizzle_info()
1165 seq_printf(m, "DDC = 0x%08x\n", in i915_swizzle_info()
1167 seq_printf(m, "DDC2 = 0x%08x\n", in i915_swizzle_info()
1169 seq_printf(m, "C0DRB3 = 0x%04x\n", in i915_swizzle_info()
1171 seq_printf(m, "C1DRB3 = 0x%04x\n", in i915_swizzle_info()
1174 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n", in i915_swizzle_info()
1176 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n", in i915_swizzle_info()
1178 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n", in i915_swizzle_info()
1180 seq_printf(m, "TILECTL = 0x%08x\n", in i915_swizzle_info()
1183 seq_printf(m, "GAMTARBMODE = 0x%08x\n", in i915_swizzle_info()
1186 seq_printf(m, "ARB_MODE = 0x%08x\n", in i915_swizzle_info()
1188 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n", in i915_swizzle_info()
1216 seq_printf(m, "RPS enabled? %s\n", yesno(intel_rps_is_enabled(rps))); in i915_rps_boost_info()
1217 seq_printf(m, "RPS active? %s\n", yesno(intel_rps_is_active(rps))); in i915_rps_boost_info()
1218 seq_printf(m, "GPU busy? %s\n", yesno(dev_priv->gt.awake)); in i915_rps_boost_info()
1219 seq_printf(m, "Boosts outstanding? %d\n", in i915_rps_boost_info()
1221 seq_printf(m, "Interactive? %d\n", READ_ONCE(rps->power.interactive)); in i915_rps_boost_info()
1222 seq_printf(m, "Frequency requested %d, actual %d\n", in i915_rps_boost_info()
1225 seq_printf(m, " min hard:%d, soft:%d; max soft:%d, hard:%d\n", in i915_rps_boost_info()
1230 seq_printf(m, " idle:%d, efficient:%d, boost:%d\n", in i915_rps_boost_info()
1235 seq_printf(m, "Wait boosts: %d\n", atomic_read(&rps->boosts)); in i915_rps_boost_info()
1248 seq_printf(m, "\nRPS Autotuning (current \"%s\" window):\n", in i915_rps_boost_info()
1250 seq_printf(m, " Avg. up: %d%% [above threshold? %d%%]\n", in i915_rps_boost_info()
1253 seq_printf(m, " Avg. down: %d%% [below threshold? %d%%]\n", in i915_rps_boost_info()
1268 seq_printf(m, "LLC: %s\n", yesno(HAS_LLC(dev_priv))); in i915_llc()
1269 seq_printf(m, "%s: %uMB\n", edram ? "eDRAM" : "eLLC", in i915_llc()
1283 seq_printf(m, "Runtime power status: %s\n", in i915_runtime_pm_status()
1286 seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->gt.awake)); in i915_runtime_pm_status()
1287 seq_printf(m, "IRQs disabled: %s\n", in i915_runtime_pm_status()
1290 seq_printf(m, "Usage count: %d\n", in i915_runtime_pm_status()
1293 seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n"); in i915_runtime_pm_status()
1295 seq_printf(m, "PCI device power state: %s [%d]\n", in i915_runtime_pm_status()
1317 seq_printf(m, "GT awake? %s [%d]\n", in i915_engine_info()
1320 seq_printf(m, "CS timestamp frequency: %u Hz\n", in i915_engine_info()
1336 seq_printf(m, "seeks = %d\n", i915->mm.shrinker.seeks); in i915_shrinker_info()
1337 seq_printf(m, "batch = %lu\n", i915->mm.shrinker.batch); in i915_shrinker_info()
1356 seq_printf(m, "%s: Workarounds applied: %u\n", in i915_wa_registers()
1360 seq_printf(m, "0x%X: 0x%08X, mask: 0x%08X\n", in i915_wa_registers()
1364 seq_printf(m, "\n"); in i915_wa_registers()