Lines Matching refs:R_VCS

416 #define R_VCS	(R_VCS1 | R_VCS2)  macro
419 #define R_ALL (R_RCS | R_VCS | R_BCS | R_VECS)
2555 		R_VCS, D_ALL, 0, 12, NULL},
2558 		R_VCS, D_ALL, 0, 12, NULL},
2561 		R_VCS, D_BDW_PLUS, 0, 12, NULL},
2564 		F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
2567 		F_LEN_VAR, R_VCS, D_BDW_PLUS, ADDR_FIX_3(1, 3, 5), 12, NULL},
2569 	{"OP_2_0_0_5", OP_2_0_0_5, F_LEN_VAR, R_VCS, D_BDW_PLUS, 0, 12, NULL},
2572 		R_VCS, D_ALL, 0, 12, NULL},
2575 		R_VCS, D_ALL, 0, 12, NULL},
2578 		R_VCS, D_ALL, 0, 12, NULL},
2581 		R_VCS, D_ALL, 0, 12, NULL},
2584 		R_VCS, D_ALL, 0, 12, NULL},
2587 		R_VCS, D_ALL, 0, 12, NULL},
2590 		R_VCS, D_ALL, 0, 6, NULL},
2593 		R_VCS, D_ALL, 0, 12, NULL},
2596 		R_VCS, D_ALL, 0, 12, NULL},
2599 		R_VCS, D_ALL, 0, 12, NULL},
2602 		R_VCS, D_ALL, 0, 12, NULL},
2605 		R_VCS, D_ALL, 0, 12, NULL},
2608 		R_VCS, D_ALL, 0, 12, NULL},
2611 		R_VCS, D_ALL, 0, 12, NULL},
2613 		R_VCS, D_ALL, 0, 12, NULL},
2616 		R_VCS, D_ALL, 0, 12, NULL},
2619 		R_VCS, D_ALL, ADDR_FIX_1(2), 12, NULL},
2622 		R_VCS, D_ALL, 0, 12, NULL},
2625 		R_VCS, D_ALL, 0, 12, NULL},
2628 		R_VCS, D_ALL, 0, 12, NULL},
2631 		R_VCS, D_ALL, 0, 12, NULL},
2634 		R_VCS, D_ALL, 0, 12, NULL},
2637 		R_VCS, D_ALL, 0, 12, NULL},
2640 		R_VCS, D_ALL, 0, 12, NULL},
2643 		R_VCS, D_ALL, 0, 12, NULL},
2646 		R_VCS, D_ALL, 0, 12, NULL},
2649 		R_VCS, D_ALL, 0, 12, NULL},
2652 		R_VCS, D_ALL, 0, 12, NULL},
2654 	{"MFX_2_6_0_0", OP_MFX_2_6_0_0, F_LEN_VAR, R_VCS, D_ALL,
2657 	{"MFX_2_6_0_9", OP_MFX_2_6_0_9, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
2659 	{"MFX_2_6_0_8", OP_MFX_2_6_0_8, F_LEN_VAR, R_VCS, D_ALL, 0, 16, NULL},
2662 		R_VCS, D_ALL, 0, 12, NULL},
2665 		R_VCS, D_ALL, 0, 12, NULL},
2668 		R_VCS, D_ALL, 0, 12, NULL},