Lines Matching full:1280
70 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen11_rc6_enable()
71 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen11_rc6_enable()
84 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we in gen11_rc6_enable()
143 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen9_rc6_enable()
144 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen9_rc6_enable()
155 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we in gen9_rc6_enable()
202 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen8_rc6_enable()
203 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen8_rc6_enable()
353 set(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in chv_rc6_enable()
354 set(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in chv_rc6_enable()
754 mul = 1280; in intel_rc6_residency_ns()