53 static int i8xx_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in i8xx_pipe_crc_ctl_reg()  argument
56 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in i8xx_pipe_crc_ctl_reg()
57 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i8xx_pipe_crc_ctl_reg()
59 	switch (*source) {  in i8xx_pipe_crc_ctl_reg()
75 				     enum intel_pipe_crc_source *source)  in i9xx_pipe_crc_auto_source()  argument
83 	*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in i9xx_pipe_crc_auto_source()
97 			*source = INTEL_PIPE_CRC_SOURCE_TV;  in i9xx_pipe_crc_auto_source()
104 				*source = INTEL_PIPE_CRC_SOURCE_DP_B;  in i9xx_pipe_crc_auto_source()
107 				*source = INTEL_PIPE_CRC_SOURCE_DP_C;  in i9xx_pipe_crc_auto_source()
110 				*source = INTEL_PIPE_CRC_SOURCE_DP_D;  in i9xx_pipe_crc_auto_source()
129 				enum intel_pipe_crc_source *source,  in vlv_pipe_crc_ctl_reg()  argument
134 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) {  in vlv_pipe_crc_ctl_reg()
135 		int ret = i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in vlv_pipe_crc_ctl_reg()
140 	switch (*source) {  in vlv_pipe_crc_ctl_reg()
199 				 enum intel_pipe_crc_source *source,  in i9xx_pipe_crc_ctl_reg()  argument
202 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO) {  in i9xx_pipe_crc_ctl_reg()
203 		int ret = i9xx_pipe_crc_auto_source(dev_priv, pipe, source);  in i9xx_pipe_crc_ctl_reg()
208 	switch (*source) {  in i9xx_pipe_crc_ctl_reg()
222 		 * The DP CRC source doesn't work on g4x.  in i9xx_pipe_crc_ctl_reg()
224 		 * the correct CRC source before the port is enabled,  in i9xx_pipe_crc_ctl_reg()
225 		 * and not touching the CRC source bits again until  in i9xx_pipe_crc_ctl_reg()
260 static int ilk_pipe_crc_ctl_reg(enum intel_pipe_crc_source *source,  in ilk_pipe_crc_ctl_reg()  argument
263 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ilk_pipe_crc_ctl_reg()
264 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ilk_pipe_crc_ctl_reg()
266 	switch (*source) {  in ilk_pipe_crc_ctl_reg()
339 				enum intel_pipe_crc_source *source,  in ivb_pipe_crc_ctl_reg()  argument
342 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in ivb_pipe_crc_ctl_reg()
343 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in ivb_pipe_crc_ctl_reg()
345 	switch (*source) {  in ivb_pipe_crc_ctl_reg()
367 				enum intel_pipe_crc_source *source,  in skl_pipe_crc_ctl_reg()  argument
370 	if (*source == INTEL_PIPE_CRC_SOURCE_AUTO)  in skl_pipe_crc_ctl_reg()
371 		*source = INTEL_PIPE_CRC_SOURCE_PIPE;  in skl_pipe_crc_ctl_reg()
373 	switch (*source) {  in skl_pipe_crc_ctl_reg()
410 			       enum intel_pipe_crc_source *source, u32 *val)  in get_new_crc_ctl_reg()  argument
413 		return i8xx_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
415 		return i9xx_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
417 		return vlv_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
419 		return ilk_pipe_crc_ctl_reg(source, val);  in get_new_crc_ctl_reg()
421 		return ivb_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
423 		return skl_pipe_crc_ctl_reg(dev_priv, pipe, source, val);  in get_new_crc_ctl_reg()
452 				 const enum intel_pipe_crc_source source)  in i8xx_crc_source_valid()  argument
454 	switch (source) {  in i8xx_crc_source_valid()
464 				 const enum intel_pipe_crc_source source)  in i9xx_crc_source_valid()  argument
466 	switch (source) {  in i9xx_crc_source_valid()
477 				const enum intel_pipe_crc_source source)  in vlv_crc_source_valid()  argument
479 	switch (source) {  in vlv_crc_source_valid()
492 				const enum intel_pipe_crc_source source)  in ilk_crc_source_valid()  argument
494 	switch (source) {  in ilk_crc_source_valid()
506 				const enum intel_pipe_crc_source source)  in ivb_crc_source_valid()  argument
508 	switch (source) {  in ivb_crc_source_valid()
520 				const enum intel_pipe_crc_source source)  in skl_crc_source_valid()  argument
522 	switch (source) {  in skl_crc_source_valid()
540 			  const enum intel_pipe_crc_source source)  in intel_is_valid_crc_source()  argument
543 		return i8xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
545 		return i9xx_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
547 		return vlv_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
549 		return ilk_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
551 		return ivb_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
553 		return skl_crc_source_valid(dev_priv, source);  in intel_is_valid_crc_source()
567 	enum intel_pipe_crc_source source;  in intel_crtc_verify_crc_source()  local
569 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_verify_crc_source()
570 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_verify_crc_source()
574 	if (source == INTEL_PIPE_CRC_SOURCE_AUTO ||  in intel_crtc_verify_crc_source()
575 	    intel_is_valid_crc_source(dev_priv, source) == 0) {  in intel_crtc_verify_crc_source()
589 	enum intel_pipe_crc_source source;  in intel_crtc_set_crc_source()  local
595 	if (display_crc_ctl_parse_source(source_name, &source) < 0) {  in intel_crtc_set_crc_source()
596 		drm_dbg(&dev_priv->drm, "unknown source %s\n", source_name);  in intel_crtc_set_crc_source()
608 	enable = source != INTEL_PIPE_CRC_SOURCE_NONE;  in intel_crtc_set_crc_source()
612 	ret = get_new_crc_ctl_reg(dev_priv, crtc->index, &source, &val);  in intel_crtc_set_crc_source()
616 	pipe_crc->source = source;  in intel_crtc_set_crc_source()
620 	if (!source) {  in intel_crtc_set_crc_source()
646 	if (get_new_crc_ctl_reg(dev_priv, crtc->index, &pipe_crc->source, &val) < 0)  in intel_crtc_enable_pipe_crc()