4165 	u8 train_set = intel_dp->train_set[0];  in vlv_set_signal_levels()  local
4167 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in vlv_set_signal_levels()
4170 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in vlv_set_signal_levels()
4193 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in vlv_set_signal_levels()
4212 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in vlv_set_signal_levels()
4227 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in vlv_set_signal_levels()
4249 	u8 train_set = intel_dp->train_set[0];  in chv_set_signal_levels()  local
4251 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in chv_set_signal_levels()
4253 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in chv_set_signal_levels()
4276 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in chv_set_signal_levels()
4294 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in chv_set_signal_levels()
4308 		switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in chv_set_signal_levels()
4325 static u32 g4x_signal_levels(u8 train_set)  in g4x_signal_levels()  argument
4329 	switch (train_set & DP_TRAIN_VOLTAGE_SWING_MASK) {  in g4x_signal_levels()
4344 	switch (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) {  in g4x_signal_levels()
4366 	u8 train_set = intel_dp->train_set[0];  in g4x_set_signal_levels()  local
4369 	signal_levels = g4x_signal_levels(train_set);  in g4x_set_signal_levels()
4382 static u32 snb_cpu_edp_signal_levels(u8 train_set)  in snb_cpu_edp_signal_levels()  argument
4384 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in snb_cpu_edp_signal_levels()
4413 	u8 train_set = intel_dp->train_set[0];  in snb_cpu_edp_set_signal_levels()  local
4416 	signal_levels = snb_cpu_edp_signal_levels(train_set);  in snb_cpu_edp_set_signal_levels()
4429 static u32 ivb_cpu_edp_signal_levels(u8 train_set)  in ivb_cpu_edp_signal_levels()  argument
4431 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in ivb_cpu_edp_signal_levels()
4464 	u8 train_set = intel_dp->train_set[0];  in ivb_cpu_edp_set_signal_levels()  local
4467 	signal_levels = ivb_cpu_edp_signal_levels(train_set);  in ivb_cpu_edp_set_signal_levels()
4482 	u8 train_set = intel_dp->train_set[0];  in intel_dp_set_signal_levels()  local
4485 		    train_set & DP_TRAIN_VOLTAGE_SWING_MASK,  in intel_dp_set_signal_levels()
4486 		    train_set & DP_TRAIN_MAX_SWING_REACHED ? " (max)" : "");  in intel_dp_set_signal_levels()
4488 		    (train_set & DP_TRAIN_PRE_EMPHASIS_MASK) >>  in intel_dp_set_signal_levels()
4490 		    train_set & DP_TRAIN_MAX_PRE_EMPHASIS_REACHED ?  in intel_dp_set_signal_levels()