4327 	u32 signal_levels = 0;  in g4x_signal_levels()  local
4332 		signal_levels |= DP_VOLTAGE_0_4;  in g4x_signal_levels()
4335 		signal_levels |= DP_VOLTAGE_0_6;  in g4x_signal_levels()
4338 		signal_levels |= DP_VOLTAGE_0_8;  in g4x_signal_levels()
4341 		signal_levels |= DP_VOLTAGE_1_2;  in g4x_signal_levels()
4347 		signal_levels |= DP_PRE_EMPHASIS_0;  in g4x_signal_levels()
4350 		signal_levels |= DP_PRE_EMPHASIS_3_5;  in g4x_signal_levels()
4353 		signal_levels |= DP_PRE_EMPHASIS_6;  in g4x_signal_levels()
4356 		signal_levels |= DP_PRE_EMPHASIS_9_5;  in g4x_signal_levels()
4359 	return signal_levels;  in g4x_signal_levels()
4367 	u32 signal_levels;  in g4x_set_signal_levels()  local
4369 	signal_levels = g4x_signal_levels(train_set);  in g4x_set_signal_levels()
4372 		    signal_levels);  in g4x_set_signal_levels()
4375 	intel_dp->DP |= signal_levels;  in g4x_set_signal_levels()
4384 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in snb_cpu_edp_signal_levels()  local
4387 	switch (signal_levels) {  in snb_cpu_edp_signal_levels()
4404 			      "0x%x\n", signal_levels);  in snb_cpu_edp_signal_levels()
4414 	u32 signal_levels;  in snb_cpu_edp_set_signal_levels()  local
4416 	signal_levels = snb_cpu_edp_signal_levels(train_set);  in snb_cpu_edp_set_signal_levels()
4419 		    signal_levels);  in snb_cpu_edp_set_signal_levels()
4422 	intel_dp->DP |= signal_levels;  in snb_cpu_edp_set_signal_levels()
4431 	u8 signal_levels = train_set & (DP_TRAIN_VOLTAGE_SWING_MASK |  in ivb_cpu_edp_signal_levels()  local
4434 	switch (signal_levels) {  in ivb_cpu_edp_signal_levels()
4455 			      "0x%x\n", signal_levels);  in ivb_cpu_edp_signal_levels()
4465 	u32 signal_levels;  in ivb_cpu_edp_set_signal_levels()  local
4467 	signal_levels = ivb_cpu_edp_signal_levels(train_set);  in ivb_cpu_edp_set_signal_levels()
4470 		    signal_levels);  in ivb_cpu_edp_set_signal_levels()
4473 	intel_dp->DP |= signal_levels;  in ivb_cpu_edp_set_signal_levels()