794 	u32 DP;  in vlv_power_sequencer_kick()  local
811 	DP = intel_de_read(dev_priv, intel_dp->output_reg) & DP_DETECTED;  in vlv_power_sequencer_kick()
812 	DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in vlv_power_sequencer_kick()
813 	DP |= DP_PORT_WIDTH(1);  in vlv_power_sequencer_kick()
814 	DP |= DP_LINK_TRAIN_PAT_1;  in vlv_power_sequencer_kick()
817 		DP |= DP_PIPE_SEL_CHV(pipe);  in vlv_power_sequencer_kick()
819 		DP |= DP_PIPE_SEL(pipe);  in vlv_power_sequencer_kick()
846 	intel_de_write(dev_priv, intel_dp->output_reg, DP);  in vlv_power_sequencer_kick()
849 	intel_de_write(dev_priv, intel_dp->output_reg, DP | DP_PORT_EN);  in vlv_power_sequencer_kick()
852 	intel_de_write(dev_priv, intel_dp->output_reg, DP & ~DP_PORT_EN);  in vlv_power_sequencer_kick()
2825 	intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg) & DP_DETECTED;  in intel_dp_prepare()
2828 	intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in intel_dp_prepare()
2829 	intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count);  in intel_dp_prepare()
2835 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
2837 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
2838 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
2841 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
2843 		intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);  in intel_dp_prepare()
2847 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
2857 			intel_dp->DP |= DP_COLOR_RANGE_16_235;  in intel_dp_prepare()
2860 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
2862 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
2863 		intel_dp->DP |= DP_LINK_TRAIN_OFF;  in intel_dp_prepare()
2866 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
2869 			intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);  in intel_dp_prepare()
2871 			intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);  in intel_dp_prepare()
3416 	intel_dp->DP &= ~DP_PLL_FREQ_MASK;  in ilk_edp_pll_on()
3419 		intel_dp->DP |= DP_PLL_FREQ_162MHZ;  in ilk_edp_pll_on()
3421 		intel_dp->DP |= DP_PLL_FREQ_270MHZ;  in ilk_edp_pll_on()
3423 	intel_de_write(dev_priv, DP_A, intel_dp->DP);  in ilk_edp_pll_on()
3436 	intel_dp->DP |= DP_PLL_ENABLE;  in ilk_edp_pll_on()
3438 	intel_de_write(dev_priv, DP_A, intel_dp->DP);  in ilk_edp_pll_on()
3455 	intel_dp->DP &= ~DP_PLL_ENABLE;  in ilk_edp_pll_off()
3457 	intel_de_write(dev_priv, DP_A, intel_dp->DP);  in ilk_edp_pll_off()
3777 	u32 *DP = &intel_dp->DP;  in cpt_set_link_train()  local
3779 	*DP &= ~DP_LINK_TRAIN_MASK_CPT;  in cpt_set_link_train()
3783 		*DP |= DP_LINK_TRAIN_OFF_CPT;  in cpt_set_link_train()
3786 		*DP |= DP_LINK_TRAIN_PAT_1_CPT;  in cpt_set_link_train()
3789 		*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in cpt_set_link_train()
3794 		*DP |= DP_LINK_TRAIN_PAT_2_CPT;  in cpt_set_link_train()
3798 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in cpt_set_link_train()
3807 	u32 *DP = &intel_dp->DP;  in g4x_set_link_train()  local
3809 	*DP &= ~DP_LINK_TRAIN_MASK;  in g4x_set_link_train()
3813 		*DP |= DP_LINK_TRAIN_OFF;  in g4x_set_link_train()
3816 		*DP |= DP_LINK_TRAIN_PAT_1;  in g4x_set_link_train()
3819 		*DP |= DP_LINK_TRAIN_PAT_2;  in g4x_set_link_train()
3824 		*DP |= DP_LINK_TRAIN_PAT_2;  in g4x_set_link_train()
3828 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in g4x_set_link_train()
3847 	intel_dp->DP |= DP_PORT_EN;  in intel_dp_enable_port()
3849 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_enable_port()
3851 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
4374 	intel_dp->DP &= ~(DP_VOLTAGE_MASK | DP_PRE_EMPHASIS_MASK);  in g4x_set_signal_levels()
4375 	intel_dp->DP |= signal_levels;  in g4x_set_signal_levels()
4377 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in g4x_set_signal_levels()
4421 	intel_dp->DP &= ~EDP_LINK_TRAIN_VOL_EMP_MASK_SNB;  in snb_cpu_edp_set_signal_levels()
4422 	intel_dp->DP |= signal_levels;  in snb_cpu_edp_set_signal_levels()
4424 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in snb_cpu_edp_set_signal_levels()
4472 	intel_dp->DP &= ~EDP_LINK_TRAIN_VOL_EMP_MASK_IVB;  in ivb_cpu_edp_set_signal_levels()
4473 	intel_dp->DP |= signal_levels;  in ivb_cpu_edp_set_signal_levels()
4475 	intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP);  in ivb_cpu_edp_set_signal_levels()
4525 	u32 DP = intel_dp->DP;  in intel_dp_link_down()  local
4536 		DP &= ~DP_LINK_TRAIN_MASK_CPT;  in intel_dp_link_down()
4537 		DP |= DP_LINK_TRAIN_PAT_IDLE_CPT;  in intel_dp_link_down()
4539 		DP &= ~DP_LINK_TRAIN_MASK;  in intel_dp_link_down()
4540 		DP |= DP_LINK_TRAIN_PAT_IDLE;  in intel_dp_link_down()
4542 	intel_de_write(dev_priv, intel_dp->output_reg, DP);  in intel_dp_link_down()
4545 	DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE);  in intel_dp_link_down()
4546 	intel_de_write(dev_priv, intel_dp->output_reg, DP);  in intel_dp_link_down()
4563 		DP &= ~(DP_PIPE_SEL_MASK | DP_LINK_TRAIN_MASK);  in intel_dp_link_down()
4564 		DP |= DP_PORT_EN | DP_PIPE_SEL(PIPE_A) |  in intel_dp_link_down()
4566 		intel_de_write(dev_priv, intel_dp->output_reg, DP);  in intel_dp_link_down()
4569 		DP &= ~DP_PORT_EN;  in intel_dp_link_down()
4570 		intel_de_write(dev_priv, intel_dp->output_reg, DP);  in intel_dp_link_down()
4580 	intel_dp->DP = DP;  in intel_dp_link_down()
6605 		intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);  in intel_dp_encoder_reset()
7772 	intel_dp->DP = intel_de_read(dev_priv, intel_dp->output_reg);  in intel_dp_init_connector()