1094 		i915_reg_t reg = PIPECONF(cpu_transcoder);  in intel_wait_for_pipe_off()
1280 		u32 val = intel_de_read(dev_priv, PIPECONF(cpu_transcoder));  in assert_pipe()
1681 	pipeconf_val = intel_de_read(dev_priv, PIPECONF(pipe));  in ilk_enable_pch_transcoder()
1735 	pipeconf_val = intel_de_read(dev_priv, PIPECONF(cpu_transcoder));  in lpt_enable_pch_transcoder()
1882 	reg = PIPECONF(cpu_transcoder);  in intel_enable_pipe()
1923 	reg = PIPECONF(cpu_transcoder);  in intel_disable_pipe()
5493 	temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;  in ilk_fdi_pll_enable()
5563 	temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;  in ilk_fdi_disable()
5592 	temp |= (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) << 11;  in ilk_fdi_disable()
5921 		u32 bpc = (intel_de_read(dev_priv, PIPECONF(pipe)) & PIPECONF_BPC_MASK) >> 5;  in ilk_pch_enable()
8890 		return intel_de_read(dev_priv, PIPECONF(cpu_transcoder)) & PIPECONF_INTERLACE_MASK_HSW;  in intel_pipe_is_interlaced()
8892 		return intel_de_read(dev_priv, PIPECONF(cpu_transcoder)) & PIPECONF_INTERLACE_MASK;  in intel_pipe_is_interlaced()
8986 		pipeconf |= intel_de_read(dev_priv, PIPECONF(crtc->pipe)) & PIPECONF_ENABLE;  in i9xx_set_pipeconf()
9033 	intel_de_write(dev_priv, PIPECONF(crtc->pipe), pipeconf);  in i9xx_set_pipeconf()
9034 	intel_de_posting_read(dev_priv, PIPECONF(crtc->pipe));  in i9xx_set_pipeconf()
9481 	tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));  in i9xx_get_pipe_config()
10142 	intel_de_write(dev_priv, PIPECONF(pipe), val);  in ilk_set_pipeconf()
10143 	intel_de_posting_read(dev_priv, PIPECONF(pipe));  in ilk_set_pipeconf()
10165 	intel_de_write(dev_priv, PIPECONF(cpu_transcoder), val);  in hsw_set_pipeconf()
10166 	intel_de_posting_read(dev_priv, PIPECONF(cpu_transcoder));  in hsw_set_pipeconf()
10718 	tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));  in ilk_get_pipe_config()
11067 	tmp = intel_de_read(dev_priv, PIPECONF(pipe_config->cpu_transcoder));  in hsw_get_transcoder_state()
11228 					PIPECONF(pipe_config->cpu_transcoder));  in hsw_get_pipe_config()
18127 	intel_de_write(dev_priv, PIPECONF(pipe),  in i830_enable_pipe()
18129 	intel_de_posting_read(dev_priv, PIPECONF(pipe));  in i830_enable_pipe()
18155 	intel_de_write(dev_priv, PIPECONF(pipe), 0);  in i830_disable_pipe()
18156 	intel_de_posting_read(dev_priv, PIPECONF(pipe));  in i830_disable_pipe()
18241 		i915_reg_t reg = PIPECONF(cpu_transcoder);  in intel_sanitize_frame_start_delay()
19080 							  PIPECONF(cpu_transcoder));  in intel_display_capture_error_state()