635 			      struct drm_display_mode *adjusted_mode,  in mdfld_crtc_mode_set()  argument
666 		 adjusted_mode->hdisplay);  in mdfld_crtc_mode_set()
668 		 adjusted_mode->vdisplay);  in mdfld_crtc_mode_set()
670 		 adjusted_mode->hsync_start);  in mdfld_crtc_mode_set()
672 		 adjusted_mode->hsync_end);  in mdfld_crtc_mode_set()
674 		 adjusted_mode->htotal);  in mdfld_crtc_mode_set()
676 		 adjusted_mode->vsync_start);  in mdfld_crtc_mode_set()
678 		 adjusted_mode->vsync_end);  in mdfld_crtc_mode_set()
680 		 adjusted_mode->vtotal);  in mdfld_crtc_mode_set()
682 		 adjusted_mode->clock);  in mdfld_crtc_mode_set()
693 	memcpy(&gma_crtc->saved_adjusted_mode, adjusted_mode,  in mdfld_crtc_mode_set()
741 		REG_WRITE(map->size, ((min(mode->crtc_vdisplay, adjusted_mode->crtc_vdisplay) - 1) << 16)  in mdfld_crtc_mode_set()
742 				| (min(mode->crtc_hdisplay, adjusted_mode->crtc_hdisplay) - 1));  in mdfld_crtc_mode_set()
768 		offsetX = (adjusted_mode->crtc_hdisplay -  in mdfld_crtc_mode_set()
770 		offsetY = (adjusted_mode->crtc_vdisplay -  in mdfld_crtc_mode_set()
774 			((adjusted_mode->crtc_htotal - 1) << 16));  in mdfld_crtc_mode_set()
776 			((adjusted_mode->crtc_vtotal - 1) << 16));  in mdfld_crtc_mode_set()
777 		REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start -  in mdfld_crtc_mode_set()
779 			((adjusted_mode->crtc_hblank_end - offsetX - 1) << 16));  in mdfld_crtc_mode_set()
780 		REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start -  in mdfld_crtc_mode_set()
782 			((adjusted_mode->crtc_hsync_end - offsetX - 1) << 16));  in mdfld_crtc_mode_set()
783 		REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start -  in mdfld_crtc_mode_set()
785 			((adjusted_mode->crtc_vblank_end - offsetY - 1) << 16));  in mdfld_crtc_mode_set()
786 		REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start -  in mdfld_crtc_mode_set()
788 			((adjusted_mode->crtc_vsync_end - offsetY - 1) << 16));  in mdfld_crtc_mode_set()
790 		REG_WRITE(map->htotal, (adjusted_mode->crtc_hdisplay - 1) |  in mdfld_crtc_mode_set()
791 			((adjusted_mode->crtc_htotal - 1) << 16));  in mdfld_crtc_mode_set()
792 		REG_WRITE(map->vtotal, (adjusted_mode->crtc_vdisplay - 1) |  in mdfld_crtc_mode_set()
793 			((adjusted_mode->crtc_vtotal - 1) << 16));  in mdfld_crtc_mode_set()
794 		REG_WRITE(map->hblank, (adjusted_mode->crtc_hblank_start - 1) |  in mdfld_crtc_mode_set()
795 			((adjusted_mode->crtc_hblank_end - 1) << 16));  in mdfld_crtc_mode_set()
796 		REG_WRITE(map->hsync, (adjusted_mode->crtc_hsync_start - 1) |  in mdfld_crtc_mode_set()
797 			((adjusted_mode->crtc_hsync_end - 1) << 16));  in mdfld_crtc_mode_set()
798 		REG_WRITE(map->vblank, (adjusted_mode->crtc_vblank_start - 1) |  in mdfld_crtc_mode_set()
799 			((adjusted_mode->crtc_vblank_end - 1) << 16));  in mdfld_crtc_mode_set()
800 		REG_WRITE(map->vsync, (adjusted_mode->crtc_vsync_start - 1) |  in mdfld_crtc_mode_set()
801 			((adjusted_mode->crtc_vsync_end - 1) << 16));  in mdfld_crtc_mode_set()
821 	clk = adjusted_mode->clock;  in mdfld_crtc_mode_set()
866 					adjusted_mode->clock, clk_tmp);  in mdfld_crtc_mode_set()