Lines Matching +full:quirk +full:- +full:frame +full:- +full:length +full:- +full:adjustment

3  * Copyright (c) 2007-2008 Intel Corporation
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
48 (((edid)->version > (maj)) || \
49 ((edid)->version == (maj) && (edid)->revision > (min)))
64 /* Reported 135MHz pixel clock is too high, needs adjustment */
76 /* Force reduced-blanking timings for detailed modes */
115 /* BOE model on HP Pavilion 15-n233sl reports 8 bpc, but is a 6 bpc panel */
121 /* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
131 /* Envision Peripherals, Inc. EN-7100e */
143 /* LG Philips LCD LP154W01-A5 */
149 /* Samsung SyncMaster 22[5-6]BW */
153 /* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
165 /* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
168 /* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
225 /* 0x01 - 640x350@85Hz */
229 /* 0x02 - 640x400@85Hz */
233 /* 0x03 - 720x400@85Hz */
237 /* 0x04 - 640x480@60Hz */
241 /* 0x05 - 640x480@72Hz */
245 /* 0x06 - 640x480@75Hz */
249 /* 0x07 - 640x480@85Hz */
253 /* 0x08 - 800x600@56Hz */
257 /* 0x09 - 800x600@60Hz */
261 /* 0x0a - 800x600@72Hz */
265 /* 0x0b - 800x600@75Hz */
269 /* 0x0c - 800x600@85Hz */
273 /* 0x0d - 800x600@120Hz RB */
277 /* 0x0e - 848x480@60Hz */
281 /* 0x0f - 1024x768@43Hz, interlace */
286 /* 0x10 - 1024x768@60Hz */
290 /* 0x11 - 1024x768@70Hz */
294 /* 0x12 - 1024x768@75Hz */
298 /* 0x13 - 1024x768@85Hz */
302 /* 0x14 - 1024x768@120Hz RB */
306 /* 0x15 - 1152x864@75Hz */
310 /* 0x55 - 1280x720@60Hz */
314 /* 0x16 - 1280x768@60Hz RB */
318 /* 0x17 - 1280x768@60Hz */
322 /* 0x18 - 1280x768@75Hz */
326 /* 0x19 - 1280x768@85Hz */
330 /* 0x1a - 1280x768@120Hz RB */
334 /* 0x1b - 1280x800@60Hz RB */
338 /* 0x1c - 1280x800@60Hz */
342 /* 0x1d - 1280x800@75Hz */
346 /* 0x1e - 1280x800@85Hz */
350 /* 0x1f - 1280x800@120Hz RB */
354 /* 0x20 - 1280x960@60Hz */
358 /* 0x21 - 1280x960@85Hz */
362 /* 0x22 - 1280x960@120Hz RB */
366 /* 0x23 - 1280x1024@60Hz */
370 /* 0x24 - 1280x1024@75Hz */
374 /* 0x25 - 1280x1024@85Hz */
378 /* 0x26 - 1280x1024@120Hz RB */
382 /* 0x27 - 1360x768@60Hz */
386 /* 0x28 - 1360x768@120Hz RB */
390 /* 0x51 - 1366x768@60Hz */
394 /* 0x56 - 1366x768@60Hz */
398 /* 0x29 - 1400x1050@60Hz RB */
402 /* 0x2a - 1400x1050@60Hz */
406 /* 0x2b - 1400x1050@75Hz */
410 /* 0x2c - 1400x1050@85Hz */
414 /* 0x2d - 1400x1050@120Hz RB */
418 /* 0x2e - 1440x900@60Hz RB */
422 /* 0x2f - 1440x900@60Hz */
426 /* 0x30 - 1440x900@75Hz */
430 /* 0x31 - 1440x900@85Hz */
434 /* 0x32 - 1440x900@120Hz RB */
438 /* 0x53 - 1600x900@60Hz */
442 /* 0x33 - 1600x1200@60Hz */
446 /* 0x34 - 1600x1200@65Hz */
450 /* 0x35 - 1600x1200@70Hz */
454 /* 0x36 - 1600x1200@75Hz */
458 /* 0x37 - 1600x1200@85Hz */
462 /* 0x38 - 1600x1200@120Hz RB */
466 /* 0x39 - 1680x1050@60Hz RB */
470 /* 0x3a - 1680x1050@60Hz */
474 /* 0x3b - 1680x1050@75Hz */
478 /* 0x3c - 1680x1050@85Hz */
482 /* 0x3d - 1680x1050@120Hz RB */
486 /* 0x3e - 1792x1344@60Hz */
490 /* 0x3f - 1792x1344@75Hz */
494 /* 0x40 - 1792x1344@120Hz RB */
498 /* 0x41 - 1856x1392@60Hz */
502 /* 0x42 - 1856x1392@75Hz */
506 /* 0x43 - 1856x1392@120Hz RB */
510 /* 0x52 - 1920x1080@60Hz */
514 /* 0x44 - 1920x1200@60Hz RB */
518 /* 0x45 - 1920x1200@60Hz */
522 /* 0x46 - 1920x1200@75Hz */
526 /* 0x47 - 1920x1200@85Hz */
530 /* 0x48 - 1920x1200@120Hz RB */
534 /* 0x49 - 1920x1440@60Hz */
538 /* 0x4a - 1920x1440@75Hz */
542 /* 0x4b - 1920x1440@120Hz RB */
546 /* 0x54 - 2048x1152@60Hz */
550 /* 0x4c - 2560x1600@60Hz RB */
554 /* 0x4d - 2560x1600@60Hz */
558 /* 0x4e - 2560x1600@75Hz */
562 /* 0x4f - 2560x1600@85Hz */
566 /* 0x50 - 2560x1600@120Hz RB */
570 /* 0x57 - 4096x2160@60Hz RB */
574 /* 0x58 - 4096x2160@59.94Hz RB */
583 * modes are old-school Mac modes. The EDID spec says the 1152x864@75 mode
587 * The DMT modes have been fact-checked; the rest are mild guesses.
714 * From CEA/CTA-861 spec.
719 /* 1 - 640x480@60Hz 4:3 */
724 /* 2 - 720x480@60Hz 4:3 */
729 /* 3 - 720x480@60Hz 16:9 */
734 /* 4 - 1280x720@60Hz 16:9 */
739 /* 5 - 1920x1080i@60Hz 16:9 */
745 /* 6 - 720(1440)x480i@60Hz 4:3 */
751 /* 7 - 720(1440)x480i@60Hz 16:9 */
757 /* 8 - 720(1440)x240@60Hz 4:3 */
763 /* 9 - 720(1440)x240@60Hz 16:9 */
769 /* 10 - 2880x480i@60Hz 4:3 */
775 /* 11 - 2880x480i@60Hz 16:9 */
781 /* 12 - 2880x240@60Hz 4:3 */
786 /* 13 - 2880x240@60Hz 16:9 */
791 /* 14 - 1440x480@60Hz 4:3 */
796 /* 15 - 1440x480@60Hz 16:9 */
801 /* 16 - 1920x1080@60Hz 16:9 */
806 /* 17 - 720x576@50Hz 4:3 */
811 /* 18 - 720x576@50Hz 16:9 */
816 /* 19 - 1280x720@50Hz 16:9 */
821 /* 20 - 1920x1080i@50Hz 16:9 */
827 /* 21 - 720(1440)x576i@50Hz 4:3 */
833 /* 22 - 720(1440)x576i@50Hz 16:9 */
839 /* 23 - 720(1440)x288@50Hz 4:3 */
845 /* 24 - 720(1440)x288@50Hz 16:9 */
851 /* 25 - 2880x576i@50Hz 4:3 */
857 /* 26 - 2880x576i@50Hz 16:9 */
863 /* 27 - 2880x288@50Hz 4:3 */
868 /* 28 - 2880x288@50Hz 16:9 */
873 /* 29 - 1440x576@50Hz 4:3 */
878 /* 30 - 1440x576@50Hz 16:9 */
883 /* 31 - 1920x1080@50Hz 16:9 */
888 /* 32 - 1920x1080@24Hz 16:9 */
893 /* 33 - 1920x1080@25Hz 16:9 */
898 /* 34 - 1920x1080@30Hz 16:9 */
903 /* 35 - 2880x480@60Hz 4:3 */
908 /* 36 - 2880x480@60Hz 16:9 */
913 /* 37 - 2880x576@50Hz 4:3 */
918 /* 38 - 2880x576@50Hz 16:9 */
923 /* 39 - 1920x1080i@50Hz 16:9 */
929 /* 40 - 1920x1080i@100Hz 16:9 */
935 /* 41 - 1280x720@100Hz 16:9 */
940 /* 42 - 720x576@100Hz 4:3 */
945 /* 43 - 720x576@100Hz 16:9 */
950 /* 44 - 720(1440)x576i@100Hz 4:3 */
956 /* 45 - 720(1440)x576i@100Hz 16:9 */
962 /* 46 - 1920x1080i@120Hz 16:9 */
968 /* 47 - 1280x720@120Hz 16:9 */
973 /* 48 - 720x480@120Hz 4:3 */
978 /* 49 - 720x480@120Hz 16:9 */
983 /* 50 - 720(1440)x480i@120Hz 4:3 */
989 /* 51 - 720(1440)x480i@120Hz 16:9 */
995 /* 52 - 720x576@200Hz 4:3 */
1000 /* 53 - 720x576@200Hz 16:9 */
1005 /* 54 - 720(1440)x576i@200Hz 4:3 */
1011 /* 55 - 720(1440)x576i@200Hz 16:9 */
1017 /* 56 - 720x480@240Hz 4:3 */
1022 /* 57 - 720x480@240Hz 16:9 */
1027 /* 58 - 720(1440)x480i@240Hz 4:3 */
1033 /* 59 - 720(1440)x480i@240Hz 16:9 */
1039 /* 60 - 1280x720@24Hz 16:9 */
1044 /* 61 - 1280x720@25Hz 16:9 */
1049 /* 62 - 1280x720@30Hz 16:9 */
1054 /* 63 - 1920x1080@120Hz 16:9 */
1059 /* 64 - 1920x1080@100Hz 16:9 */
1064 /* 65 - 1280x720@24Hz 64:27 */
1069 /* 66 - 1280x720@25Hz 64:27 */
1074 /* 67 - 1280x720@30Hz 64:27 */
1079 /* 68 - 1280x720@50Hz 64:27 */
1084 /* 69 - 1280x720@60Hz 64:27 */
1089 /* 70 - 1280x720@100Hz 64:27 */
1094 /* 71 - 1280x720@120Hz 64:27 */
1099 /* 72 - 1920x1080@24Hz 64:27 */
1104 /* 73 - 1920x1080@25Hz 64:27 */
1109 /* 74 - 1920x1080@30Hz 64:27 */
1114 /* 75 - 1920x1080@50Hz 64:27 */
1119 /* 76 - 1920x1080@60Hz 64:27 */
1124 /* 77 - 1920x1080@100Hz 64:27 */
1129 /* 78 - 1920x1080@120Hz 64:27 */
1134 /* 79 - 1680x720@24Hz 64:27 */
1139 /* 80 - 1680x720@25Hz 64:27 */
1144 /* 81 - 1680x720@30Hz 64:27 */
1149 /* 82 - 1680x720@50Hz 64:27 */
1154 /* 83 - 1680x720@60Hz 64:27 */
1159 /* 84 - 1680x720@100Hz 64:27 */
1164 /* 85 - 1680x720@120Hz 64:27 */
1169 /* 86 - 2560x1080@24Hz 64:27 */
1174 /* 87 - 2560x1080@25Hz 64:27 */
1179 /* 88 - 2560x1080@30Hz 64:27 */
1184 /* 89 - 2560x1080@50Hz 64:27 */
1189 /* 90 - 2560x1080@60Hz 64:27 */
1194 /* 91 - 2560x1080@100Hz 64:27 */
1199 /* 92 - 2560x1080@120Hz 64:27 */
1204 /* 93 - 3840x2160@24Hz 16:9 */
1209 /* 94 - 3840x2160@25Hz 16:9 */
1214 /* 95 - 3840x2160@30Hz 16:9 */
1219 /* 96 - 3840x2160@50Hz 16:9 */
1224 /* 97 - 3840x2160@60Hz 16:9 */
1229 /* 98 - 4096x2160@24Hz 256:135 */
1234 /* 99 - 4096x2160@25Hz 256:135 */
1239 /* 100 - 4096x2160@30Hz 256:135 */
1244 /* 101 - 4096x2160@50Hz 256:135 */
1249 /* 102 - 4096x2160@60Hz 256:135 */
1254 /* 103 - 3840x2160@24Hz 64:27 */
1259 /* 104 - 3840x2160@25Hz 64:27 */
1264 /* 105 - 3840x2160@30Hz 64:27 */
1269 /* 106 - 3840x2160@50Hz 64:27 */
1274 /* 107 - 3840x2160@60Hz 64:27 */
1279 /* 108 - 1280x720@48Hz 16:9 */
1284 /* 109 - 1280x720@48Hz 64:27 */
1289 /* 110 - 1680x720@48Hz 64:27 */
1294 /* 111 - 1920x1080@48Hz 16:9 */
1299 /* 112 - 1920x1080@48Hz 64:27 */
1304 /* 113 - 2560x1080@48Hz 64:27 */
1309 /* 114 - 3840x2160@48Hz 16:9 */
1314 /* 115 - 4096x2160@48Hz 256:135 */
1319 /* 116 - 3840x2160@48Hz 64:27 */
1324 /* 117 - 3840x2160@100Hz 16:9 */
1329 /* 118 - 3840x2160@120Hz 16:9 */
1334 /* 119 - 3840x2160@100Hz 64:27 */
1339 /* 120 - 3840x2160@120Hz 64:27 */
1344 /* 121 - 5120x2160@24Hz 64:27 */
1349 /* 122 - 5120x2160@25Hz 64:27 */
1354 /* 123 - 5120x2160@30Hz 64:27 */
1359 /* 124 - 5120x2160@48Hz 64:27 */
1364 /* 125 - 5120x2160@50Hz 64:27 */
1369 /* 126 - 5120x2160@60Hz 64:27 */
1374 /* 127 - 5120x2160@100Hz 64:27 */
1382 * From CEA/CTA-861 spec.
1387 /* 193 - 5120x2160@120Hz 64:27 */
1392 /* 194 - 7680x4320@24Hz 16:9 */
1397 /* 195 - 7680x4320@25Hz 16:9 */
1402 /* 196 - 7680x4320@30Hz 16:9 */
1407 /* 197 - 7680x4320@48Hz 16:9 */
1412 /* 198 - 7680x4320@50Hz 16:9 */
1417 /* 199 - 7680x4320@60Hz 16:9 */
1422 /* 200 - 7680x4320@100Hz 16:9 */
1427 /* 201 - 7680x4320@120Hz 16:9 */
1432 /* 202 - 7680x4320@24Hz 64:27 */
1437 /* 203 - 7680x4320@25Hz 64:27 */
1442 /* 204 - 7680x4320@30Hz 64:27 */
1447 /* 205 - 7680x4320@48Hz 64:27 */
1452 /* 206 - 7680x4320@50Hz 64:27 */
1457 /* 207 - 7680x4320@60Hz 64:27 */
1462 /* 208 - 7680x4320@100Hz 64:27 */
1467 /* 209 - 7680x4320@120Hz 64:27 */
1472 /* 210 - 10240x4320@24Hz 64:27 */
1477 /* 211 - 10240x4320@25Hz 64:27 */
1482 /* 212 - 10240x4320@30Hz 64:27 */
1487 /* 213 - 10240x4320@48Hz 64:27 */
1492 /* 214 - 10240x4320@50Hz 64:27 */
1497 /* 215 - 10240x4320@60Hz 64:27 */
1502 /* 216 - 10240x4320@100Hz 64:27 */
1507 /* 217 - 10240x4320@120Hz 64:27 */
1512 /* 218 - 4096x2160@100Hz 256:135 */
1517 /* 219 - 4096x2160@120Hz 256:135 */
1528 /* 0 - dummy, VICs start at 1 */
1530 /* 1 - 3840x2160@30Hz */
1536 /* 2 - 3840x2160@25Hz */
1542 /* 3 - 3840x2160@24Hz */
1548 /* 4 - 4096x2160@24Hz (SMPTE) */
1563 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1585 "Minimum number of valid EDID header bytes (0-8, default 6)");
1587 static int validate_displayid(u8 *displayid, int length, int idx);
1594 for (i = 0; i < EDID_LENGTH - 1; i++) in drm_edid_block_checksum()
1597 crc = 0x100 - csum; in drm_edid_block_checksum()
1604 if (raw_edid[EDID_LENGTH - 1] != real_checksum) in drm_edid_block_checksum_diff()
1610 static bool drm_edid_is_zero(const u8 *in_edid, int length) in drm_edid_is_zero() argument
1612 if (memchr_inv(in_edid, 0, length)) in drm_edid_is_zero()
1619 * drm_edid_are_equal - compare two edid blobs.
1635 edid1_len = EDID_LENGTH * (1 + edid1->extensions); in drm_edid_are_equal()
1636 edid2_len = EDID_LENGTH * (1 + edid2->extensions); in drm_edid_are_equal()
1650 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1682 * fix-up code here will correct the problem, the in drm_edid_block_valid()
1713 /* per-block-type checks */ in drm_edid_block_valid()
1716 if (edid->version != 1) { in drm_edid_block_valid()
1717 DRM_NOTE("EDID has major version %d, instead of 1\n", edid->version); in drm_edid_block_valid()
1721 if (edid->revision > 4) in drm_edid_block_valid()
1747 * drm_edid_is_valid - sanity check EDID data
1750 * Sanity-check an entire EDID record (including extensions)
1762 for (i = 0; i <= edid->extensions; i++) in drm_edid_is_valid()
1772 * drm_do_probe_ddc_edid() - get EDID information via I2C
1776 * @len: EDID data buffer length to fetch
1780 * Return: 0 on success or -1 on failure.
1793 * adapter reports EAGAIN. However, we find that bit-banging transfers in drm_do_probe_ddc_edid()
1819 * Avoid sending the segment addr to not upset non-compliant in drm_do_probe_ddc_edid()
1822 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers); in drm_do_probe_ddc_edid()
1824 if (ret == -ENXIO) { in drm_do_probe_ddc_edid()
1825 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n", in drm_do_probe_ddc_edid()
1826 adapter->name); in drm_do_probe_ddc_edid()
1829 } while (ret != xfers && --retries); in drm_do_probe_ddc_edid()
1831 return ret == xfers ? 0 : -1; in drm_do_probe_ddc_edid()
1841 connector->real_edid_checksum = in connector_bad_edid()
1844 if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS)) in connector_bad_edid()
1847 drm_warn(connector->dev, "%s: EDID is invalid:\n", connector->name); in connector_bad_edid()
1870 if (connector->override_edid) in drm_get_override_edid()
1871 override = drm_edid_duplicate(connector->edid_blob_ptr->data); in drm_get_override_edid()
1880 * drm_add_override_edid_modes - add modes from override/firmware EDID
1902 connector->base.id, connector->name, num_modes); in drm_add_override_edid_modes()
1910 * drm_do_get_edid - get EDID data using a custom EDID block read function
1950 &connector->edid_corrupt)) in drm_do_get_edid()
1953 connector->null_edid_counter++; in drm_do_get_edid()
1981 valid_extensions--; in drm_do_get_edid()
1989 edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions; in drm_do_get_edid()
2023 * drm_probe_ddc() - probe DDC presence
2038 * drm_get_edid - get EDID data, if available
2052 if (connector->force == DRM_FORCE_OFF) in drm_get_edid()
2055 if (connector->force == DRM_FORCE_UNSPECIFIED && !drm_probe_ddc(adapter)) in drm_get_edid()
2065 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
2078 struct pci_dev *pdev = connector->dev->pdev; in drm_get_edid_switcheroo()
2090 * drm_edid_duplicate - duplicate an EDID and the extensions
2097 return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL); in drm_edid_duplicate()
2104 * edid_vendor - match a string against EDID's obfuscated vendor field
2114 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; in edid_vendor()
2115 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | in edid_vendor()
2116 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; in edid_vendor()
2117 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; in edid_vendor()
2123 * edid_get_quirks - return quirk flags for a given EDID
2130 const struct edid_quirk *quirk; in edid_get_quirks() local
2134 quirk = &edid_quirk_list[i]; in edid_get_quirks()
2136 if (edid_vendor(edid, quirk->vendor) && in edid_get_quirks()
2137 (EDID_PRODUCT_ID(edid) == quirk->product_id)) in edid_get_quirks()
2138 return quirk->quirks; in edid_get_quirks()
2144 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
2145 #define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
2148 * edid_fixup_preferred - set preferred modes based on quirk list
2162 if (list_empty(&connector->probed_modes)) in edid_fixup_preferred()
2170 preferred_mode = list_first_entry(&connector->probed_modes, in edid_fixup_preferred()
2173 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { in edid_fixup_preferred()
2174 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2193 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; in edid_fixup_preferred()
2199 return (mode->htotal - mode->hdisplay == 160) && in mode_is_rb()
2200 (mode->hsync_end - mode->hdisplay == 80) && in mode_is_rb()
2201 (mode->hsync_end - mode->hsync_start == 32) && in mode_is_rb()
2202 (mode->vsync_start - mode->vdisplay == 3); in mode_is_rb()
2206 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
2211 * @rb: Mode reduced-blanking-ness
2226 if (hsize != ptr->hdisplay) in drm_mode_find_dmt()
2228 if (vsize != ptr->vdisplay) in drm_mode_find_dmt()
2265 n = (127 - d) / 18; in cea_for_each_detailed_block()
2293 cb(&(edid->detailed_timings[i]), closure); in drm_for_each_detailed_block()
2327 if (edid->revision >= 4) { in drm_monitor_supports_rb()
2334 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); in drm_monitor_supports_rb()
2396 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
2401 if (edid->revision >= 2) { in standard_timing_level()
2402 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) in standard_timing_level()
2406 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) in standard_timing_level()
2426 if (mode->htotal <= 0) in drm_mode_hsync()
2429 return DIV_ROUND_CLOSEST(mode->clock, mode->htotal); in drm_mode_hsync()
2433 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
2445 struct drm_device *dev = connector->dev; in drm_mode_std()
2449 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) in drm_mode_std()
2451 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) in drm_mode_std()
2455 if (bad_std_timing(t->hsize, t->vfreq_aspect)) in drm_mode_std()
2459 hsize = t->hsize * 8 + 248; in drm_mode_std()
2464 if (edid->revision < 3) in drm_mode_std()
2489 list_for_each_entry(m, &connector->probed_modes, head) in drm_mode_std()
2490 if (m->hdisplay == hsize && m->vdisplay == vsize && in drm_mode_std()
2500 mode->hdisplay = 1366; in drm_mode_std()
2501 mode->hsync_start = mode->hsync_start - 1; in drm_mode_std()
2502 mode->hsync_end = mode->hsync_end - 1; in drm_mode_std()
2553 * encoded. Our internal representation is of frame height, but some
2556 * The format list here is from CEA, in frame size. Technically we
2576 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) in drm_mode_do_interlace_quirk()
2580 if ((mode->hdisplay == cea_interlaced[i].w) && in drm_mode_do_interlace_quirk()
2581 (mode->vdisplay == cea_interlaced[i].h / 2)) { in drm_mode_do_interlace_quirk()
2582 mode->vdisplay *= 2; in drm_mode_do_interlace_quirk()
2583 mode->vsync_start *= 2; in drm_mode_do_interlace_quirk()
2584 mode->vsync_end *= 2; in drm_mode_do_interlace_quirk()
2585 mode->vtotal *= 2; in drm_mode_do_interlace_quirk()
2586 mode->vtotal |= 1; in drm_mode_do_interlace_quirk()
2590 mode->flags |= DRM_MODE_FLAG_INTERLACE; in drm_mode_do_interlace_quirk()
2594 * drm_mode_detailed - create a new mode from an EDID detailed timing section
2609 struct detailed_pixel_timing *pt = &timing->data.pixel_data; in drm_mode_detailed()
2610 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; in drm_mode_detailed()
2611 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; in drm_mode_detailed()
2612 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; in drm_mode_detailed()
2613 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; in drm_mode_detailed()
2614 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; in drm_mode_detailed()
2615 …unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse… in drm_mode_detailed()
2616 …unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_puls… in drm_mode_detailed()
2617 …unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offse… in drm_mode_detailed()
2623 if (pt->misc & DRM_EDID_PT_STEREO) { in drm_mode_detailed()
2627 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { in drm_mode_detailed()
2651 timing->pixel_clock = cpu_to_le16(1088); in drm_mode_detailed()
2653 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; in drm_mode_detailed()
2655 mode->hdisplay = hactive; in drm_mode_detailed()
2656 mode->hsync_start = mode->hdisplay + hsync_offset; in drm_mode_detailed()
2657 mode->hsync_end = mode->hsync_start + hsync_pulse_width; in drm_mode_detailed()
2658 mode->htotal = mode->hdisplay + hblank; in drm_mode_detailed()
2660 mode->vdisplay = vactive; in drm_mode_detailed()
2661 mode->vsync_start = mode->vdisplay + vsync_offset; in drm_mode_detailed()
2662 mode->vsync_end = mode->vsync_start + vsync_pulse_width; in drm_mode_detailed()
2663 mode->vtotal = mode->vdisplay + vblank; in drm_mode_detailed()
2666 if (mode->hsync_end > mode->htotal) in drm_mode_detailed()
2667 mode->htotal = mode->hsync_end + 1; in drm_mode_detailed()
2668 if (mode->vsync_end > mode->vtotal) in drm_mode_detailed()
2669 mode->vtotal = mode->vsync_end + 1; in drm_mode_detailed()
2674 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; in drm_mode_detailed()
2677 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? in drm_mode_detailed()
2679 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? in drm_mode_detailed()
2683 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; in drm_mode_detailed()
2684 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; in drm_mode_detailed()
2687 mode->width_mm *= 10; in drm_mode_detailed()
2688 mode->height_mm *= 10; in drm_mode_detailed()
2692 mode->width_mm = edid->width_cm * 10; in drm_mode_detailed()
2693 mode->height_mm = edid->height_cm * 10; in drm_mode_detailed()
2696 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_detailed()
2709 if (edid->revision >= 4) in mode_in_hsync_range()
2712 if (edid->revision >= 4) in mode_in_hsync_range()
2726 if (edid->revision >= 4) in mode_in_vsync_range()
2729 if (edid->revision >= 4) in mode_in_vsync_range()
2744 if (edid->revision >= 4 && t[10] == 0x04) in range_pixel_clock()
2745 return (t[9] * 10000) - ((t[12] >> 2) * 250); in range_pixel_clock()
2765 if (mode->clock > max_clock) in mode_in_range()
2769 if (edid->revision >= 4 && t[10] == 0x04) in mode_in_range()
2770 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) in mode_in_range()
2785 list_for_each_entry(m, &connector->probed_modes, head) { in valid_inferred_mode()
2786 if (mode->hdisplay == m->hdisplay && in valid_inferred_mode()
2787 mode->vdisplay == m->vdisplay && in valid_inferred_mode()
2790 if (mode->hdisplay <= m->hdisplay && in valid_inferred_mode()
2791 mode->vdisplay <= m->vdisplay) in valid_inferred_mode()
2803 struct drm_device *dev = connector->dev; in drm_dmt_modes_for_range()
2824 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { in drm_mode_fixup_1366x768()
2825 mode->hdisplay = 1366; in drm_mode_fixup_1366x768()
2826 mode->hsync_start--; in drm_mode_fixup_1366x768()
2827 mode->hsync_end--; in drm_mode_fixup_1366x768()
2838 struct drm_device *dev = connector->dev; in drm_gtf_modes_for_range()
2843 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); in drm_gtf_modes_for_range()
2867 struct drm_device *dev = connector->dev; in drm_cvt_modes_for_range()
2873 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); in drm_cvt_modes_for_range()
2895 struct detailed_non_pixel *data = &timing->data.other_data; in do_inferred_modes()
2896 struct detailed_data_monitor_range *range = &data->data.range; in do_inferred_modes()
2901 closure->modes += drm_dmt_modes_for_range(closure->connector, in do_inferred_modes()
2902 closure->edid, in do_inferred_modes()
2905 if (!version_greater(closure->edid, 1, 1)) in do_inferred_modes()
2908 switch (range->flags) { in do_inferred_modes()
2911 closure->modes += drm_gtf_modes_for_range(closure->connector, in do_inferred_modes()
2912 closure->edid, in do_inferred_modes()
2916 if (!version_greater(closure->edid, 1, 3)) in do_inferred_modes()
2919 closure->modes += drm_cvt_modes_for_range(closure->connector, in do_inferred_modes()
2920 closure->edid, in do_inferred_modes()
2952 for (j = 7; j >= 0; j--) { in drm_est3_modes()
2953 m = (i * 8) + (7 - j); in drm_est3_modes()
2957 mode = drm_mode_find_dmt(connector->dev, in drm_est3_modes()
2981 closure->modes += drm_est3_modes(closure->connector, timing); in do_established_modes()
2985 * add_established_modes - get est. modes from EDID and add them
2995 struct drm_device *dev = connector->dev; in add_established_modes()
2996 unsigned long est_bits = edid->established_timings.t1 | in add_established_modes()
2997 (edid->established_timings.t2 << 8) | in add_established_modes()
2998 ((edid->established_timings.mfg_rsvd & 0x80) << 9); in add_established_modes()
3028 struct detailed_non_pixel *data = &timing->data.other_data; in do_standard_modes()
3029 struct drm_connector *connector = closure->connector; in do_standard_modes()
3030 struct edid *edid = closure->edid; in do_standard_modes()
3037 struct std_timing *std = &data->data.timings[i]; in do_standard_modes()
3043 closure->modes++; in do_standard_modes()
3049 * add_standard_modes - get std. modes from EDID and add them
3069 &edid->standard_timings[i]); in add_standard_modes()
3090 struct drm_device *dev = connector->dev; in drm_cvt_modes()
3098 cvt = &(timing->data.other_data.data.cvt[i]); in drm_cvt_modes()
3100 if (!memcmp(cvt->code, empty, 3)) in drm_cvt_modes()
3103 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; in drm_cvt_modes()
3104 switch (cvt->code[1] & 0x0c) { in drm_cvt_modes()
3120 if (cvt->code[2] & (1 << j)) { in drm_cvt_modes()
3143 closure->modes += drm_cvt_modes(closure->connector, timing); in do_cvt_mode()
3173 newmode = drm_mode_detailed(closure->connector->dev, in do_detailed_mode()
3174 closure->edid, timing, in do_detailed_mode()
3175 closure->quirks); in do_detailed_mode()
3179 if (closure->preferred) in do_detailed_mode()
3180 newmode->type |= DRM_MODE_TYPE_PREFERRED; in do_detailed_mode()
3189 drm_mode_probed_add(closure->connector, newmode); in do_detailed_mode()
3190 closure->modes++; in do_detailed_mode()
3191 closure->preferred = false; in do_detailed_mode()
3195 * add_detailed_modes - Add modes from detailed timings
3213 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); in add_detailed_modes()
3244 if (edid == NULL || edid->extensions == 0) in drm_find_edid_extension()
3248 for (i = *ext_index; i < edid->extensions; i++) { in drm_find_edid_extension()
3254 if (i >= edid->extensions) in drm_find_edid_extension()
3264 int *length, int *idx, in drm_find_displayid_extension() argument
3275 *length = EDID_LENGTH - 1; in drm_find_displayid_extension()
3278 ret = validate_displayid(displayid, *length, *idx); in drm_find_displayid_extension()
3283 *length = *idx + sizeof(*base) + base->bytes; in drm_find_displayid_extension()
3290 int length, idx; in drm_find_cea_extension() local
3306 displayid = drm_find_displayid_extension(edid, &length, &idx, in drm_find_cea_extension()
3312 for_each_displayid_db(displayid, block, idx, length) { in drm_find_cea_extension()
3313 if (block->tag == DATA_BLOCK_CTA) in drm_find_cea_extension()
3323 BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127); in cea_mode_for_vic()
3324 BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219); in cea_mode_for_vic()
3327 return &edid_cea_modes_1[vic - 1]; in cea_mode_for_vic()
3329 return &edid_cea_modes_193[vic - 193]; in cea_mode_for_vic()
3352 unsigned int clock = cea_mode->clock; in cea_mode_alternate_clock()
3362 if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480) in cea_mode_alternate_clock()
3380 * vertical front porch length. in cea_mode_alternate_timings()
3382 BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 || in cea_mode_alternate_timings()
3383 cea_mode_for_vic(9)->vtotal != 262 || in cea_mode_alternate_timings()
3384 cea_mode_for_vic(12)->vtotal != 262 || in cea_mode_alternate_timings()
3385 cea_mode_for_vic(13)->vtotal != 262 || in cea_mode_alternate_timings()
3386 cea_mode_for_vic(23)->vtotal != 312 || in cea_mode_alternate_timings()
3387 cea_mode_for_vic(24)->vtotal != 312 || in cea_mode_alternate_timings()
3388 cea_mode_for_vic(27)->vtotal != 312 || in cea_mode_alternate_timings()
3389 cea_mode_for_vic(28)->vtotal != 312); in cea_mode_alternate_timings()
3392 vic == 12 || vic == 13) && mode->vtotal < 263) || in cea_mode_alternate_timings()
3394 vic == 27 || vic == 28) && mode->vtotal < 314)) { in cea_mode_alternate_timings()
3395 mode->vsync_start++; in cea_mode_alternate_timings()
3396 mode->vsync_end++; in cea_mode_alternate_timings()
3397 mode->vtotal++; in cea_mode_alternate_timings()
3411 if (!to_match->clock) in drm_match_cea_mode_clock_tolerance()
3414 if (to_match->picture_aspect_ratio) in drm_match_cea_mode_clock_tolerance()
3425 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_cea_mode_clock_tolerance()
3426 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_cea_mode_clock_tolerance()
3439 * drm_match_cea_mode - look for a CEA mode matching given mode
3442 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
3450 if (!to_match->clock) in drm_match_cea_mode()
3453 if (to_match->picture_aspect_ratio) in drm_match_cea_mode()
3464 if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) && in drm_match_cea_mode()
3465 KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2)) in drm_match_cea_mode()
3488 return mode->picture_aspect_ratio; in drm_get_cea_aspect_ratio()
3514 if (!to_match->clock) in drm_match_hdmi_mode_clock_tolerance()
3517 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode_clock_tolerance()
3525 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode_clock_tolerance()
3528 if (abs(to_match->clock - clock1) > clock_tolerance && in drm_match_hdmi_mode_clock_tolerance()
3529 abs(to_match->clock - clock2) > clock_tolerance) in drm_match_hdmi_mode_clock_tolerance()
3540 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
3552 if (!to_match->clock) in drm_match_hdmi_mode()
3555 if (to_match->picture_aspect_ratio) in drm_match_hdmi_mode()
3563 clock1 = hdmi_mode->clock; in drm_match_hdmi_mode()
3566 if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) || in drm_match_hdmi_mode()
3567 KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) && in drm_match_hdmi_mode()
3582 struct drm_device *dev = connector->dev; in add_alternate_cea_modes()
3595 list_for_each_entry(mode, &connector->probed_modes, head) { in add_alternate_cea_modes()
3615 clock1 = cea_mode->clock; in add_alternate_cea_modes()
3620 if (mode->clock != clock1 && mode->clock != clock2) in add_alternate_cea_modes()
3628 newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK; in add_alternate_cea_modes()
3634 if (mode->clock != clock1) in add_alternate_cea_modes()
3635 newmode->clock = clock1; in add_alternate_cea_modes()
3637 newmode->clock = clock2; in add_alternate_cea_modes()
3639 list_add_tail(&newmode->head, &list); in add_alternate_cea_modes()
3643 list_del(&mode->head); in add_alternate_cea_modes()
3653 /* 0-6 bit vic, 7th bit native mode indicator */ in svd_to_vic()
3665 struct drm_device *dev = connector->dev; in drm_display_mode_from_vic_index()
3685 * do_y420vdb_modes - Parse YCBCR 420 only modes
3688 * @len: length of the CEA YCBCR 420 VDB
3690 * Parse the CEA-861-F YCBCR 420 Video Data Block (Y420VDB)
3698 struct drm_device *dev = connector->dev; in do_y420vdb_modes()
3699 struct drm_display_info *info = &connector->display_info; in do_y420vdb_modes()
3700 struct drm_hdmi_info *hdmi = &info->hdmi; in do_y420vdb_modes()
3712 bitmap_set(hdmi->y420_vdb_modes, vic, 1); in do_y420vdb_modes()
3718 info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; in do_y420vdb_modes()
3723 * drm_add_cmdb_modes - Add a YCBCR 420 mode into bitmap
3733 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_add_cmdb_modes()
3738 bitmap_set(hdmi->y420_cmdb_modes, vic, 1); in drm_add_cmdb_modes()
3742 * drm_display_mode_from_cea_vic() - return a mode for CEA VIC
3773 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in do_cea_modes()
3789 if (i < 64 && hdmi->y420_cmdb_map & (1ULL << i)) in do_cea_modes()
3822 unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE; in stereo_match_mandatory()
3824 return mode->hdisplay == stereo_mode->width && in stereo_match_mandatory()
3825 mode->vdisplay == stereo_mode->height && in stereo_match_mandatory()
3826 interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) && in stereo_match_mandatory()
3827 drm_mode_vrefresh(mode) == stereo_mode->vrefresh; in stereo_match_mandatory()
3832 struct drm_device *dev = connector->dev; in add_hdmi_mandatory_stereo_modes()
3839 list_for_each_entry(mode, &connector->probed_modes, head) { in add_hdmi_mandatory_stereo_modes()
3853 new_mode->flags |= mandatory->flags; in add_hdmi_mandatory_stereo_modes()
3854 list_add_tail(&new_mode->head, &stereo_modes); in add_hdmi_mandatory_stereo_modes()
3859 list_splice_tail(&stereo_modes, &connector->probed_modes); in add_hdmi_mandatory_stereo_modes()
3866 struct drm_device *dev = connector->dev; in add_hdmi_mode()
3894 newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING; in add_3d_struct_modes()
3904 newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM; in add_3d_struct_modes()
3914 newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF; in add_3d_struct_modes()
3924 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
3927 * @len: length of the CEA block payload, ie. one can access up to db[len]
3936 struct drm_display_info *info = &connector->display_info; in do_hdmi_vsdb_modes()
3957 /* the declared length is not long enough for the 2 first bytes in do_hdmi_vsdb_modes()
3990 if (len < (8 + offset + hdmi_3d_len - 1)) in do_hdmi_vsdb_modes()
4017 for (i = 0; i < (hdmi_3d_len - multi_len); i++) { in do_hdmi_vsdb_modes()
4025 if (detail_present && (i + 1 == hdmi_3d_len - multi_len)) in do_hdmi_vsdb_modes()
4053 newmode->flags |= newflag; in do_hdmi_vsdb_modes()
4065 info->has_hdmi_infoframe = true; in do_hdmi_vsdb_modes()
4103 /* DisplayID CTA extension blocks and top-level CEA EDID in cea_db_offsets()
4105 * 1) Byte 2 of the header specifies length differently, in cea_db_offsets()
4114 * Byte number (decimal) within this block where the 18-byte in cea_db_offsets()
4115 * DTDs begin. If no non-DTD data is present in this extension in cea_db_offsets()
4118 * no non-DTD data. in cea_db_offsets()
4134 return -ERANGE; in cea_db_offsets()
4136 return -EOPNOTSUPP; in cea_db_offsets()
4220 struct drm_display_info *info = &connector->display_info; in drm_parse_y420cmdb_bitmap()
4221 struct drm_hdmi_info *hdmi = &info->hdmi; in drm_parse_y420cmdb_bitmap()
4222 u8 map_len = cea_db_payload_len(db) - 1; in drm_parse_y420cmdb_bitmap()
4228 hdmi->y420_cmdb_map = U64_MAX; in drm_parse_y420cmdb_bitmap()
4229 info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; in drm_parse_y420cmdb_bitmap()
4252 info->color_formats |= DRM_COLOR_FORMAT_YCRCB420; in drm_parse_y420cmdb_bitmap()
4254 hdmi->y420_cmdb_map = map; in drm_parse_y420cmdb_bitmap()
4288 dbl - 1); in add_cea_modes()
4319 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
4326 clock1 = cea_mode->clock; in fixup_detailed_cea_mode_clock()
4334 if (abs(mode->clock - clock1) < abs(mode->clock - clock2)) in fixup_detailed_cea_mode_clock()
4339 if (mode->clock == clock) in fixup_detailed_cea_mode_clock()
4342 DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n", in fixup_detailed_cea_mode_clock()
4343 type, vic, mode->clock, clock); in fixup_detailed_cea_mode_clock()
4344 mode->clock = clock; in fixup_detailed_cea_mode_clock()
4383 connector->hdr_sink_metadata.hdmi_type1.eotf = in drm_parse_hdr_metadata_block()
4385 connector->hdr_sink_metadata.hdmi_type1.metadata_type = in drm_parse_hdr_metadata_block()
4389 connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4]; in drm_parse_hdr_metadata_block()
4391 connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5]; in drm_parse_hdr_metadata_block()
4393 connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6]; in drm_parse_hdr_metadata_block()
4402 connector->eld[DRM_ELD_SAD_COUNT_CONN_TYPE] |= DRM_ELD_SUPPORTS_AI; in drm_parse_hdmi_vsdb_audio()
4404 connector->latency_present[0] = db[8] >> 7; in drm_parse_hdmi_vsdb_audio()
4405 connector->latency_present[1] = (db[8] >> 6) & 1; in drm_parse_hdmi_vsdb_audio()
4408 connector->video_latency[0] = db[9]; in drm_parse_hdmi_vsdb_audio()
4410 connector->audio_latency[0] = db[10]; in drm_parse_hdmi_vsdb_audio()
4412 connector->video_latency[1] = db[11]; in drm_parse_hdmi_vsdb_audio()
4414 connector->audio_latency[1] = db[12]; in drm_parse_hdmi_vsdb_audio()
4419 connector->latency_present[0], in drm_parse_hdmi_vsdb_audio()
4420 connector->latency_present[1], in drm_parse_hdmi_vsdb_audio()
4421 connector->video_latency[0], in drm_parse_hdmi_vsdb_audio()
4422 connector->video_latency[1], in drm_parse_hdmi_vsdb_audio()
4423 connector->audio_latency[0], in drm_parse_hdmi_vsdb_audio()
4424 connector->audio_latency[1]); in drm_parse_hdmi_vsdb_audio()
4433 *(u8 **)data = t->data.other_data.data.str.str; in monitor_name()
4456 * drm_edid_get_monitor_name - fetch the monitor name from the edid
4470 name_length = min(get_monitor_name(edid, buf), bufsize - 1); in drm_edid_get_monitor_name()
4478 memset(connector->eld, 0, sizeof(connector->eld)); in clear_eld()
4480 connector->latency_present[0] = false; in clear_eld()
4481 connector->latency_present[1] = false; in clear_eld()
4482 connector->video_latency[0] = 0; in clear_eld()
4483 connector->audio_latency[0] = 0; in clear_eld()
4484 connector->video_latency[1] = 0; in clear_eld()
4485 connector->audio_latency[1] = 0; in clear_eld()
4489 * drm_edid_to_eld - build ELD from EDID
4493 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
4498 uint8_t *eld = connector->eld; in drm_edid_to_eld()
4524 eld[DRM_ELD_MANUFACTURER_NAME0] = edid->mfg_id[0]; in drm_edid_to_eld()
4525 eld[DRM_ELD_MANUFACTURER_NAME1] = edid->mfg_id[1]; in drm_edid_to_eld()
4526 eld[DRM_ELD_PRODUCT_CODE0] = edid->prod_code[0]; in drm_edid_to_eld()
4527 eld[DRM_ELD_PRODUCT_CODE1] = edid->prod_code[1]; in drm_edid_to_eld()
4545 sad_count = min(dbl / 3, 15 - total_sad_count); in drm_edid_to_eld()
4557 /* HDMI Vendor-Specific Data Block */ in drm_edid_to_eld()
4568 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort || in drm_edid_to_eld()
4569 connector->connector_type == DRM_MODE_CONNECTOR_eDP) in drm_edid_to_eld()
4582 * drm_edid_to_sad - extracts SADs from EDID
4611 return -EPROTO; in drm_edid_to_sad()
4625 return -ENOMEM; in drm_edid_to_sad()
4643 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
4673 return -EPROTO; in drm_edid_to_speaker_allocation()
4686 return -ENOMEM; in drm_edid_to_speaker_allocation()
4698 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
4702 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
4708 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); in drm_av_sync_delay()
4711 if (!connector->latency_present[0]) in drm_av_sync_delay()
4713 if (!connector->latency_present[1]) in drm_av_sync_delay()
4716 a = connector->audio_latency[i]; in drm_av_sync_delay()
4717 v = connector->video_latency[i]; in drm_av_sync_delay()
4730 a = min(2 * (a - 1), 500); in drm_av_sync_delay()
4732 v = min(2 * (v - 1), 500); in drm_av_sync_delay()
4734 return max(v - a, 0); in drm_av_sync_delay()
4739 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
4742 * Parse the CEA extension according to CEA-861-B.
4776 * drm_detect_monitor_audio - check monitor audio capability
4824 * drm_default_rgb_quant_range - default RGB quantization range
4828 * as specified in CEA-861.
4844 struct drm_display_info *info = &connector->display_info; in drm_parse_vcdb()
4849 info->rgb_quant_range_selectable = true; in drm_parse_vcdb()
4856 struct drm_hdmi_info *hdmi = &connector->display_info.hdmi; in drm_parse_ycbcr420_deep_color_info()
4859 hdmi->y420_dc_modes = dc_mask; in drm_parse_ycbcr420_deep_color_info()
4865 struct drm_display_info *display = &connector->display_info; in drm_parse_hdmi_forum_vsdb()
4866 struct drm_hdmi_info *hdmi = &display->hdmi; in drm_parse_hdmi_forum_vsdb()
4868 display->has_hdmi_infoframe = true; in drm_parse_hdmi_forum_vsdb()
4871 hdmi->scdc.supported = true; in drm_parse_hdmi_forum_vsdb()
4873 hdmi->scdc.read_request = true; in drm_parse_hdmi_forum_vsdb()
4879 * * Availability of a HF-VSDB block in EDID (check) in drm_parse_hdmi_forum_vsdb()
4880 * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check) in drm_parse_hdmi_forum_vsdb()
4888 struct drm_scdc *scdc = &hdmi->scdc; in drm_parse_hdmi_forum_vsdb()
4891 display->max_tmds_clock = max_tmds_clock; in drm_parse_hdmi_forum_vsdb()
4892 DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n", in drm_parse_hdmi_forum_vsdb()
4893 display->max_tmds_clock); in drm_parse_hdmi_forum_vsdb()
4896 if (scdc->supported) { in drm_parse_hdmi_forum_vsdb()
4897 scdc->scrambling.supported = true; in drm_parse_hdmi_forum_vsdb()
4901 scdc->scrambling.low_rates = true; in drm_parse_hdmi_forum_vsdb()
4911 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_deep_color_info()
4915 info->bpc = 8; in drm_parse_hdmi_deep_color_info()
4922 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30; in drm_parse_hdmi_deep_color_info()
4924 connector->name); in drm_parse_hdmi_deep_color_info()
4929 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36; in drm_parse_hdmi_deep_color_info()
4931 connector->name); in drm_parse_hdmi_deep_color_info()
4936 info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48; in drm_parse_hdmi_deep_color_info()
4938 connector->name); in drm_parse_hdmi_deep_color_info()
4943 connector->name); in drm_parse_hdmi_deep_color_info()
4948 connector->name, dc_bpc); in drm_parse_hdmi_deep_color_info()
4949 info->bpc = dc_bpc; in drm_parse_hdmi_deep_color_info()
4956 info->color_formats = DRM_COLOR_FORMAT_RGB444; in drm_parse_hdmi_deep_color_info()
4960 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; in drm_parse_hdmi_deep_color_info()
4962 connector->name); in drm_parse_hdmi_deep_color_info()
4971 connector->name); in drm_parse_hdmi_deep_color_info()
4978 struct drm_display_info *info = &connector->display_info; in drm_parse_hdmi_vsdb_video()
4981 info->is_hdmi = true; in drm_parse_hdmi_vsdb_video()
4984 info->dvi_dual = db[6] & 1; in drm_parse_hdmi_vsdb_video()
4986 info->max_tmds_clock = db[7] * 5000; in drm_parse_hdmi_vsdb_video()
4990 info->dvi_dual, in drm_parse_hdmi_vsdb_video()
4991 info->max_tmds_clock); in drm_parse_hdmi_vsdb_video()
4999 struct drm_display_info *info = &connector->display_info; in drm_parse_cea_ext()
5007 info->cea_rev = edid_ext[1]; in drm_parse_cea_ext()
5010 info->color_formats = DRM_COLOR_FORMAT_RGB444; in drm_parse_cea_ext()
5012 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; in drm_parse_cea_ext()
5014 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; in drm_parse_cea_ext()
5040 const struct detailed_non_pixel *data = &timing->data.other_data; in get_monitor_range()
5041 const struct detailed_data_monitor_range *range = &data->data.range; in get_monitor_range()
5052 if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG) in get_monitor_range()
5055 monitor_range->min_vfreq = range->min_vfreq; in get_monitor_range()
5056 monitor_range->max_vfreq = range->max_vfreq; in get_monitor_range()
5063 struct drm_display_info *info = &connector->display_info; in drm_get_monitor_range()
5069 &info->monitor_range); in drm_get_monitor_range()
5071 DRM_DEBUG_KMS("Supported Monitor Refresh rate range is %d Hz - %d Hz\n", in drm_get_monitor_range()
5072 info->monitor_range.min_vfreq, in drm_get_monitor_range()
5073 info->monitor_range.max_vfreq); in drm_get_monitor_range()
5082 struct drm_display_info *info = &connector->display_info; in drm_reset_display_info()
5084 info->width_mm = 0; in drm_reset_display_info()
5085 info->height_mm = 0; in drm_reset_display_info()
5087 info->bpc = 0; in drm_reset_display_info()
5088 info->color_formats = 0; in drm_reset_display_info()
5089 info->cea_rev = 0; in drm_reset_display_info()
5090 info->max_tmds_clock = 0; in drm_reset_display_info()
5091 info->dvi_dual = false; in drm_reset_display_info()
5092 info->is_hdmi = false; in drm_reset_display_info()
5093 info->has_hdmi_infoframe = false; in drm_reset_display_info()
5094 info->rgb_quant_range_selectable = false; in drm_reset_display_info()
5095 memset(&info->hdmi, 0, sizeof(info->hdmi)); in drm_reset_display_info()
5097 info->non_desktop = 0; in drm_reset_display_info()
5098 memset(&info->monitor_range, 0, sizeof(info->monitor_range)); in drm_reset_display_info()
5103 struct drm_display_info *info = &connector->display_info; in drm_add_display_info()
5109 info->width_mm = edid->width_cm * 10; in drm_add_display_info()
5110 info->height_mm = edid->height_cm * 10; in drm_add_display_info()
5112 info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP); in drm_add_display_info()
5116 DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop); in drm_add_display_info()
5118 if (edid->revision < 3) in drm_add_display_info()
5121 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) in drm_add_display_info()
5133 if (info->bpc == 0 && edid->revision == 3 && in drm_add_display_info()
5134 edid->input & DRM_EDID_DIGITAL_DFP_1_X) { in drm_add_display_info()
5135 info->bpc = 8; in drm_add_display_info()
5137 connector->name, info->bpc); in drm_add_display_info()
5141 if (edid->revision < 4) in drm_add_display_info()
5144 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { in drm_add_display_info()
5146 info->bpc = 6; in drm_add_display_info()
5149 info->bpc = 8; in drm_add_display_info()
5152 info->bpc = 10; in drm_add_display_info()
5155 info->bpc = 12; in drm_add_display_info()
5158 info->bpc = 14; in drm_add_display_info()
5161 info->bpc = 16; in drm_add_display_info()
5165 info->bpc = 0; in drm_add_display_info()
5169 DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n", in drm_add_display_info()
5170 connector->name, info->bpc); in drm_add_display_info()
5172 info->color_formats |= DRM_COLOR_FORMAT_RGB444; in drm_add_display_info()
5173 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) in drm_add_display_info()
5174 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; in drm_add_display_info()
5175 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) in drm_add_display_info()
5176 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; in drm_add_display_info()
5180 static int validate_displayid(u8 *displayid, int length, int idx) in validate_displayid() argument
5188 DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n", in validate_displayid()
5189 base->rev, base->bytes, base->prod_id, base->ext_count); in validate_displayid()
5192 dispid_length = sizeof(*base) + base->bytes + 1; in validate_displayid()
5193 if (dispid_length > length - idx) in validate_displayid()
5194 return -EINVAL; in validate_displayid()
5200 return -EINVAL; in validate_displayid()
5210 unsigned pixel_clock = (timings->pixel_clock[0] | in drm_mode_displayid_detailed()
5211 (timings->pixel_clock[1] << 8) | in drm_mode_displayid_detailed()
5212 (timings->pixel_clock[2] << 16)) + 1; in drm_mode_displayid_detailed()
5213 unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1; in drm_mode_displayid_detailed()
5214 unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1; in drm_mode_displayid_detailed()
5215 unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
5216 unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1; in drm_mode_displayid_detailed()
5217 unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1; in drm_mode_displayid_detailed()
5218 unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1; in drm_mode_displayid_detailed()
5219 unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1; in drm_mode_displayid_detailed()
5220 unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1; in drm_mode_displayid_detailed()
5221 bool hsync_positive = (timings->hsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
5222 bool vsync_positive = (timings->vsync[1] >> 7) & 0x1; in drm_mode_displayid_detailed()
5228 mode->clock = pixel_clock * 10; in drm_mode_displayid_detailed()
5229 mode->hdisplay = hactive; in drm_mode_displayid_detailed()
5230 mode->hsync_start = mode->hdisplay + hsync; in drm_mode_displayid_detailed()
5231 mode->hsync_end = mode->hsync_start + hsync_width; in drm_mode_displayid_detailed()
5232 mode->htotal = mode->hdisplay + hblank; in drm_mode_displayid_detailed()
5234 mode->vdisplay = vactive; in drm_mode_displayid_detailed()
5235 mode->vsync_start = mode->vdisplay + vsync; in drm_mode_displayid_detailed()
5236 mode->vsync_end = mode->vsync_start + vsync_width; in drm_mode_displayid_detailed()
5237 mode->vtotal = mode->vdisplay + vblank; in drm_mode_displayid_detailed()
5239 mode->flags = 0; in drm_mode_displayid_detailed()
5240 mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; in drm_mode_displayid_detailed()
5241 mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; in drm_mode_displayid_detailed()
5242 mode->type = DRM_MODE_TYPE_DRIVER; in drm_mode_displayid_detailed()
5244 if (timings->flags & 0x80) in drm_mode_displayid_detailed()
5245 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_mode_displayid_detailed()
5259 /* blocks must be multiple of 20 bytes length */ in add_displayid_detailed_1_modes()
5260 if (block->num_bytes % 20) in add_displayid_detailed_1_modes()
5263 num_timings = block->num_bytes / 20; in add_displayid_detailed_1_modes()
5265 struct displayid_detailed_timings_1 *timings = &det->timings[i]; in add_displayid_detailed_1_modes()
5267 newmode = drm_mode_displayid_detailed(connector->dev, timings); in add_displayid_detailed_1_modes()
5281 int length, idx; in add_displayid_detailed_modes() local
5287 displayid = drm_find_displayid_extension(edid, &length, &idx, in add_displayid_detailed_modes()
5293 for_each_displayid_db(displayid, block, idx, length) { in add_displayid_detailed_modes()
5294 switch (block->tag) { in add_displayid_detailed_modes()
5306 * drm_add_edid_modes - add modes from EDID data, if available
5327 drm_warn(connector->dev, "%s: EDID invalid.\n", in drm_add_edid_modes()
5328 connector->name); in drm_add_edid_modes()
5335 * CEA-861-F adds ycbcr capability map block, for HDMI 2.0 sinks. in drm_add_edid_modes()
5343 * - preferred detailed mode in drm_add_edid_modes()
5344 * - other detailed modes from base block in drm_add_edid_modes()
5345 * - detailed modes from extension blocks in drm_add_edid_modes()
5346 * - CVT 3-byte code modes in drm_add_edid_modes()
5347 * - standard timing codes in drm_add_edid_modes()
5348 * - established timing codes in drm_add_edid_modes()
5349 * - modes inferred from GTF or CVT range information in drm_add_edid_modes()
5362 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) in drm_add_edid_modes()
5369 connector->display_info.bpc = 6; in drm_add_edid_modes()
5372 connector->display_info.bpc = 8; in drm_add_edid_modes()
5375 connector->display_info.bpc = 10; in drm_add_edid_modes()
5378 connector->display_info.bpc = 12; in drm_add_edid_modes()
5385 * drm_add_modes_noedid - add modes for the connectors without EDID
5400 struct drm_device *dev = connector->dev; in drm_add_modes_noedid()
5417 if (ptr->hdisplay > hdisplay || in drm_add_modes_noedid()
5418 ptr->vdisplay > vdisplay) in drm_add_modes_noedid()
5434 * drm_set_preferred_mode - Sets the preferred mode of a connector
5447 list_for_each_entry(mode, &connector->probed_modes, head) { in drm_set_preferred_mode()
5448 if (mode->hdisplay == hpref && in drm_set_preferred_mode()
5449 mode->vdisplay == vpref) in drm_set_preferred_mode()
5450 mode->type |= DRM_MODE_TYPE_PREFERRED; in drm_set_preferred_mode()
5458 * FIXME: sil-sii8620 doesn't have a connector around when in is_hdmi2_sink()
5464 return connector->display_info.hdmi.scdc.supported || in is_hdmi2_sink()
5465 connector->display_info.color_formats & DRM_COLOR_FORMAT_YCRCB420; in is_hdmi2_sink()
5474 * drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI DRM infoframe with
5476 * @frame: HDMI DRM infoframe
5482 drm_hdmi_infoframe_set_hdr_metadata(struct hdmi_drm_infoframe *frame, in drm_hdmi_infoframe_set_hdr_metadata() argument
5489 if (!frame || !conn_state) in drm_hdmi_infoframe_set_hdr_metadata()
5490 return -EINVAL; in drm_hdmi_infoframe_set_hdr_metadata()
5492 connector = conn_state->connector; in drm_hdmi_infoframe_set_hdr_metadata()
5494 if (!conn_state->hdr_output_metadata) in drm_hdmi_infoframe_set_hdr_metadata()
5495 return -EINVAL; in drm_hdmi_infoframe_set_hdr_metadata()
5497 hdr_metadata = conn_state->hdr_output_metadata->data; in drm_hdmi_infoframe_set_hdr_metadata()
5500 return -EINVAL; in drm_hdmi_infoframe_set_hdr_metadata()
5503 if (!is_eotf_supported(hdr_metadata->hdmi_metadata_type1.eotf, in drm_hdmi_infoframe_set_hdr_metadata()
5504 connector->hdr_sink_metadata.hdmi_type1.eotf)) { in drm_hdmi_infoframe_set_hdr_metadata()
5506 return -EINVAL; in drm_hdmi_infoframe_set_hdr_metadata()
5509 err = hdmi_drm_infoframe_init(frame); in drm_hdmi_infoframe_set_hdr_metadata()
5513 frame->eotf = hdr_metadata->hdmi_metadata_type1.eotf; in drm_hdmi_infoframe_set_hdr_metadata()
5514 frame->metadata_type = hdr_metadata->hdmi_metadata_type1.metadata_type; in drm_hdmi_infoframe_set_hdr_metadata()
5516 BUILD_BUG_ON(sizeof(frame->display_primaries) != in drm_hdmi_infoframe_set_hdr_metadata()
5517 sizeof(hdr_metadata->hdmi_metadata_type1.display_primaries)); in drm_hdmi_infoframe_set_hdr_metadata()
5518 BUILD_BUG_ON(sizeof(frame->white_point) != in drm_hdmi_infoframe_set_hdr_metadata()
5519 sizeof(hdr_metadata->hdmi_metadata_type1.white_point)); in drm_hdmi_infoframe_set_hdr_metadata()
5521 memcpy(&frame->display_primaries, in drm_hdmi_infoframe_set_hdr_metadata()
5522 &hdr_metadata->hdmi_metadata_type1.display_primaries, in drm_hdmi_infoframe_set_hdr_metadata()
5523 sizeof(frame->display_primaries)); in drm_hdmi_infoframe_set_hdr_metadata()
5525 memcpy(&frame->white_point, in drm_hdmi_infoframe_set_hdr_metadata()
5526 &hdr_metadata->hdmi_metadata_type1.white_point, in drm_hdmi_infoframe_set_hdr_metadata()
5527 sizeof(frame->white_point)); in drm_hdmi_infoframe_set_hdr_metadata()
5529 frame->max_display_mastering_luminance = in drm_hdmi_infoframe_set_hdr_metadata()
5530 hdr_metadata->hdmi_metadata_type1.max_display_mastering_luminance; in drm_hdmi_infoframe_set_hdr_metadata()
5531 frame->min_display_mastering_luminance = in drm_hdmi_infoframe_set_hdr_metadata()
5532 hdr_metadata->hdmi_metadata_type1.min_display_mastering_luminance; in drm_hdmi_infoframe_set_hdr_metadata()
5533 frame->max_fall = hdr_metadata->hdmi_metadata_type1.max_fall; in drm_hdmi_infoframe_set_hdr_metadata()
5534 frame->max_cll = hdr_metadata->hdmi_metadata_type1.max_cll; in drm_hdmi_infoframe_set_hdr_metadata()
5544 connector->display_info.has_hdmi_infoframe : false; in drm_mode_hdmi_vic()
5550 if (mode->flags & DRM_MODE_FLAG_3D_MASK) in drm_mode_hdmi_vic()
5573 * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but in drm_mode_cea_vic()
5574 * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we in drm_mode_cea_vic()
5584 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
5586 * @frame: HDMI AVI infoframe
5593 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, in drm_hdmi_avi_infoframe_from_display_mode() argument
5600 if (!frame || !mode) in drm_hdmi_avi_infoframe_from_display_mode()
5601 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
5603 hdmi_avi_infoframe_init(frame); in drm_hdmi_avi_infoframe_from_display_mode()
5605 if (mode->flags & DRM_MODE_FLAG_DBLCLK) in drm_hdmi_avi_infoframe_from_display_mode()
5606 frame->pixel_repeat = 1; in drm_hdmi_avi_infoframe_from_display_mode()
5611 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; in drm_hdmi_avi_infoframe_from_display_mode()
5615 * So just initialize the frame with default values, just the same way in drm_hdmi_avi_infoframe_from_display_mode()
5618 frame->content_type = HDMI_CONTENT_TYPE_GRAPHICS; in drm_hdmi_avi_infoframe_from_display_mode()
5619 frame->itc = 0; in drm_hdmi_avi_infoframe_from_display_mode()
5625 picture_aspect = mode->picture_aspect_ratio; in drm_hdmi_avi_infoframe_from_display_mode()
5641 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
5644 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
5646 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode()
5652 frame->video_code = vic; in drm_hdmi_avi_infoframe_from_display_mode()
5653 frame->picture_aspect = picture_aspect; in drm_hdmi_avi_infoframe_from_display_mode()
5654 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; in drm_hdmi_avi_infoframe_from_display_mode()
5655 frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN; in drm_hdmi_avi_infoframe_from_display_mode()
5704 * drm_hdmi_avi_infoframe_colorspace() - fill the HDMI AVI infoframe
5706 * @frame: HDMI AVI infoframe
5710 drm_hdmi_avi_infoframe_colorspace(struct hdmi_avi_infoframe *frame, in drm_hdmi_avi_infoframe_colorspace() argument
5714 u32 colorimetry_index = conn_state->colorspace & FULL_COLORIMETRY_MASK; in drm_hdmi_avi_infoframe_colorspace()
5721 frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK; in drm_hdmi_avi_infoframe_colorspace()
5726 frame->extended_colorimetry = (colorimetry_val >> 2) & in drm_hdmi_avi_infoframe_colorspace()
5732 * drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
5734 * @frame: HDMI AVI infoframe
5740 drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame, in drm_hdmi_avi_infoframe_quant_range() argument
5745 const struct drm_display_info *info = &connector->display_info; in drm_hdmi_avi_infoframe_quant_range()
5748 * CEA-861: in drm_hdmi_avi_infoframe_quant_range()
5749 * "A Source shall not send a non-zero Q value that does not correspond in drm_hdmi_avi_infoframe_quant_range()
5754 * HDMI 2.0 recommends sending non-zero Q when it does match the in drm_hdmi_avi_infoframe_quant_range()
5757 if (info->rgb_quant_range_selectable || in drm_hdmi_avi_infoframe_quant_range()
5759 frame->quantization_range = rgb_quant_range; in drm_hdmi_avi_infoframe_quant_range()
5761 frame->quantization_range = HDMI_QUANTIZATION_RANGE_DEFAULT; in drm_hdmi_avi_infoframe_quant_range()
5764 * CEA-861-F: in drm_hdmi_avi_infoframe_quant_range()
5766 * YQ-field to match the RGB Quantization Range being transmitted in drm_hdmi_avi_infoframe_quant_range()
5768 * set YQ=1) and the Sink shall ignore the YQ-field." in drm_hdmi_avi_infoframe_quant_range()
5771 * by non-zero YQ when receiving RGB. There doesn't seem to be any in drm_hdmi_avi_infoframe_quant_range()
5772 * good way to tell which version of CEA-861 the sink supports, so in drm_hdmi_avi_infoframe_quant_range()
5773 * we limit non-zero YQ to HDMI 2.0 sinks only as HDMI 2.0 is based in drm_hdmi_avi_infoframe_quant_range()
5774 * on on CEA-861-F. in drm_hdmi_avi_infoframe_quant_range()
5778 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
5781 frame->ycc_quantization_range = in drm_hdmi_avi_infoframe_quant_range()
5787 * drm_hdmi_avi_infoframe_bars() - fill the HDMI AVI infoframe
5789 * @frame: HDMI AVI infoframe
5793 drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame, in drm_hdmi_avi_infoframe_bars() argument
5796 frame->right_bar = conn_state->tv.margins.right; in drm_hdmi_avi_infoframe_bars()
5797 frame->left_bar = conn_state->tv.margins.left; in drm_hdmi_avi_infoframe_bars()
5798 frame->top_bar = conn_state->tv.margins.top; in drm_hdmi_avi_infoframe_bars()
5799 frame->bottom_bar = conn_state->tv.margins.bottom; in drm_hdmi_avi_infoframe_bars()
5806 u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK; in s3d_structure_from_display_mode()
5831 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
5833 * @frame: HDMI vendor infoframe
5839 * function will return -EINVAL, error that can be safely ignored.
5844 drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame, in drm_hdmi_vendor_infoframe_from_display_mode() argument
5849 * FIXME: sil-sii8620 doesn't have a connector around when in drm_hdmi_vendor_infoframe_from_display_mode()
5853 connector->display_info.has_hdmi_infoframe : false; in drm_hdmi_vendor_infoframe_from_display_mode()
5856 if (!frame || !mode) in drm_hdmi_vendor_infoframe_from_display_mode()
5857 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
5860 return -EINVAL; in drm_hdmi_vendor_infoframe_from_display_mode()
5862 err = hdmi_vendor_infoframe_init(frame); in drm_hdmi_vendor_infoframe_from_display_mode()
5875 frame->vic = drm_mode_hdmi_vic(connector, mode); in drm_hdmi_vendor_infoframe_from_display_mode()
5876 frame->s3d_struct = s3d_structure_from_display_mode(mode); in drm_hdmi_vendor_infoframe_from_display_mode()
5891 w = tile->tile_size[0] | tile->tile_size[1] << 8; in drm_parse_tiled_block()
5892 h = tile->tile_size[2] | tile->tile_size[3] << 8; in drm_parse_tiled_block()
5894 num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30); in drm_parse_tiled_block()
5895 num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30); in drm_parse_tiled_block()
5896 tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4); in drm_parse_tiled_block()
5897 tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4); in drm_parse_tiled_block()
5899 connector->has_tile = true; in drm_parse_tiled_block()
5900 if (tile->tile_cap & 0x80) in drm_parse_tiled_block()
5901 connector->tile_is_single_monitor = true; in drm_parse_tiled_block()
5903 connector->num_h_tile = num_h_tile + 1; in drm_parse_tiled_block()
5904 connector->num_v_tile = num_v_tile + 1; in drm_parse_tiled_block()
5905 connector->tile_h_loc = tile_h_loc; in drm_parse_tiled_block()
5906 connector->tile_v_loc = tile_v_loc; in drm_parse_tiled_block()
5907 connector->tile_h_size = w + 1; in drm_parse_tiled_block()
5908 connector->tile_v_size = h + 1; in drm_parse_tiled_block()
5910 DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap); in drm_parse_tiled_block()
5914 DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]); in drm_parse_tiled_block()
5916 tg = drm_mode_get_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
5918 tg = drm_mode_create_tile_group(connector->dev, tile->topology_id); in drm_parse_tiled_block()
5922 if (connector->tile_group != tg) { in drm_parse_tiled_block()
5925 if (connector->tile_group) in drm_parse_tiled_block()
5926 drm_mode_put_tile_group(connector->dev, connector->tile_group); in drm_parse_tiled_block()
5927 connector->tile_group = tg; in drm_parse_tiled_block()
5930 drm_mode_put_tile_group(connector->dev, tg); in drm_parse_tiled_block()
5935 const u8 *displayid, int length, int idx) in drm_displayid_parse_tiled() argument
5940 for_each_displayid_db(displayid, block, idx, length) { in drm_displayid_parse_tiled()
5942 block->tag, block->rev, block->num_bytes); in drm_displayid_parse_tiled()
5944 switch (block->tag) { in drm_displayid_parse_tiled()
5949 DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag); in drm_displayid_parse_tiled()
5960 int length, idx; in drm_update_tile_info() local
5962 connector->has_tile = false; in drm_update_tile_info()
5964 displayid = drm_find_displayid_extension(edid, &length, &idx, in drm_update_tile_info()
5969 drm_displayid_parse_tiled(connector, displayid, length, idx); in drm_update_tile_info()
5972 if (!connector->has_tile && connector->tile_group) { in drm_update_tile_info()
5973 drm_mode_put_tile_group(connector->dev, connector->tile_group); in drm_update_tile_info()
5974 connector->tile_group = NULL; in drm_update_tile_info()