337 	regmap_update_bits(priv->regmap, 0x52, RESETDB, 0x00);  in ch7033_bridge_disable()
345 	regmap_update_bits(priv->regmap, 0x52, RESETDB, RESETDB);  in ch7033_bridge_enable()
374 	regmap_update_bits(priv->regmap, 0x07, DRI_PD | IO_PD, 0);  in ch7033_bridge_mode_set()
375 	regmap_update_bits(priv->regmap, 0x08, DRI_PDDRI | PDDAC | PANEN, 0);  in ch7033_bridge_mode_set()
376 	regmap_update_bits(priv->regmap, 0x09, DPD | GCKOFF |  in ch7033_bridge_mode_set()
378 	regmap_update_bits(priv->regmap, 0x0a, HD_DVIB, 0);  in ch7033_bridge_mode_set()
401 	regmap_update_bits(priv->regmap, 0x18, SWAP, BYTE_SWAP_BGR);  in ch7033_bridge_mode_set()
404 	regmap_update_bits(priv->regmap, 0x19, 0x1, mode->clock >> 16);  in ch7033_bridge_mode_set()
405 	regmap_update_bits(priv->regmap, 0x19, HPO_I | VPO_I | GCLKFREQ,  in ch7033_bridge_mode_set()
425 	regmap_update_bits(priv->regmap, 0x2b, VFMT, 9);  in ch7033_bridge_mode_set()
428 	regmap_update_bits(priv->regmap, 0x2e, HPO_O | VPO_O,  in ch7033_bridge_mode_set()
433 	regmap_update_bits(priv->regmap, 0x54, HWO_HDMI_HI | HOO_HDMI_HI,  in ch7033_bridge_mode_set()
440 	regmap_update_bits(priv->regmap, 0x57, VWO_HDMI_HI | VOO_HDMI_HI,  in ch7033_bridge_mode_set()
447 	regmap_update_bits(priv->regmap, 0x7e, HDMI_LVDS_SEL, HDMI_LVDS_SEL);  in ch7033_bridge_mode_set()
455 	regmap_update_bits(priv->regmap, 0x07, CKINV, CKINV);  in ch7033_bridge_mode_set()
456 	regmap_update_bits(priv->regmap, 0x08, DISPON, DISPON);  in ch7033_bridge_mode_set()
459 	regmap_update_bits(priv->regmap, 0x0c, DRI_PLL_DIVSEL, DRI_PLL_DIVSEL);  in ch7033_bridge_mode_set()
461 		regmap_update_bits(priv->regmap, 0x0c, DRI_PLL_N1_1 |  in ch7033_bridge_mode_set()
467 		regmap_update_bits(priv->regmap, 0x0c, DRI_PLL_N1_1 |  in ch7033_bridge_mode_set()
474 		regmap_update_bits(priv->regmap, 0x0c, DRI_PLL_N1_1 |  in ch7033_bridge_mode_set()
490 	regmap_update_bits(priv->regmap, 0x6b, DRI_PD_SER, 0x00);  in ch7033_bridge_mode_set()
491 	regmap_update_bits(priv->regmap, 0x6c, DRI_PLL_PD, 0x00);  in ch7033_bridge_mode_set()
499 	regmap_update_bits(priv->regmap, 0x28, VGACLK_BP | HM_LV_SEL,  in ch7033_bridge_mode_set()
501 	regmap_update_bits(priv->regmap, 0x2a, HDMICLK_BP | HDMI_BP,  in ch7033_bridge_mode_set()