Lines Matching refs:ddr_table
1847 static void ddr3_init_2500(struct ast_private *ast, const u32 *ddr_table) in ddr3_init_2500() argument
1851 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr3_init_2500()
1852 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr3_init_2500()
1853 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr3_init_2500()
1854 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr3_init_2500()
1855 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr3_init_2500()
1856 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr3_init_2500()
1857 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr3_init_2500()
1864 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr3_init_2500()
1865 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr3_init_2500()
1866 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr3_init_2500()
1867 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr3_init_2500()
1868 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr3_init_2500()
1869 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr3_init_2500()
1870 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr3_init_2500()
1871 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr3_init_2500()
1881 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr3_init_2500()
1885 check_dram_size_2500(ast, ddr_table[REGIDX_RFC]); in ddr3_init_2500()
1891 static void ddr4_init_2500(struct ast_private *ast, const u32 *ddr_table) in ddr4_init_2500() argument
1899 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr4_init_2500()
1900 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr4_init_2500()
1901 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr4_init_2500()
1902 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr4_init_2500()
1903 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr4_init_2500()
1904 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr4_init_2500()
1905 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr4_init_2500()
1912 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr4_init_2500()
1913 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr4_init_2500()
1914 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr4_init_2500()
1915 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr4_init_2500()
1916 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr4_init_2500()
1917 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr4_init_2500()
1918 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr4_init_2500()
1919 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr4_init_2500()
1991 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr4_init_2500()
1995 check_dram_size_2500(ast, ddr_table[REGIDX_RFC]); in ddr4_init_2500()