214 union power_info {  union
259 	union power_info *power_info;  in amdgpu_get_platform_caps()  local
267 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_get_platform_caps()
269 	adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);  in amdgpu_get_platform_caps()
270 	adev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime);  in amdgpu_get_platform_caps()
271 	adev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime);  in amdgpu_get_platform_caps()
289 	union power_info *power_info;  in amdgpu_parse_extended_power_table()  local
300 	power_info = (union power_info *)(mode_info->atom_context->bios + data_offset);  in amdgpu_parse_extended_power_table()
303 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
305 		if (power_info->pplib3.usFanTableOffset) {  in amdgpu_parse_extended_power_table()
307 						      le16_to_cpu(power_info->pplib3.usFanTableOffset));  in amdgpu_parse_extended_power_table()
333 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
335 		if (power_info->pplib4.usVddcDependencyOnSCLKOffset) {  in amdgpu_parse_extended_power_table()
338 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnSCLKOffset));  in amdgpu_parse_extended_power_table()
346 		if (power_info->pplib4.usVddciDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
349 				 le16_to_cpu(power_info->pplib4.usVddciDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
357 		if (power_info->pplib4.usVddcDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
360 				 le16_to_cpu(power_info->pplib4.usVddcDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
368 		if (power_info->pplib4.usMvddDependencyOnMCLKOffset) {  in amdgpu_parse_extended_power_table()
371 				 le16_to_cpu(power_info->pplib4.usMvddDependencyOnMCLKOffset));  in amdgpu_parse_extended_power_table()
379 		if (power_info->pplib4.usMaxClockVoltageOnDCOffset) {  in amdgpu_parse_extended_power_table()
383 				 le16_to_cpu(power_info->pplib4.usMaxClockVoltageOnDCOffset));  in amdgpu_parse_extended_power_table()
397 		if (power_info->pplib4.usVddcPhaseShedLimitsTableOffset) {  in amdgpu_parse_extended_power_table()
401 				 le16_to_cpu(power_info->pplib4.usVddcPhaseShedLimitsTableOffset));  in amdgpu_parse_extended_power_table()
430 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
432 		adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);  in amdgpu_parse_extended_power_table()
433 		adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);  in amdgpu_parse_extended_power_table()
435 		adev->pm.dpm.tdp_od_limit = le16_to_cpu(power_info->pplib5.usTDPODLimit);  in amdgpu_parse_extended_power_table()
441 		adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);  in amdgpu_parse_extended_power_table()
442 		adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);  in amdgpu_parse_extended_power_table()
443 		adev->pm.dpm.load_line_slope = le16_to_cpu(power_info->pplib5.usLoadLineSlope);  in amdgpu_parse_extended_power_table()
444 		if (power_info->pplib5.usCACLeakageTableOffset) {  in amdgpu_parse_extended_power_table()
448 				 le16_to_cpu(power_info->pplib5.usCACLeakageTableOffset));  in amdgpu_parse_extended_power_table()
479 	if (le16_to_cpu(power_info->pplib.usTableSize) >=  in amdgpu_parse_extended_power_table()
483 			 le16_to_cpu(power_info->pplib3.usExtendendedHeaderOffset));  in amdgpu_parse_extended_power_table()