Lines Matching +full:ip +full:- +full:block

52 * DOC: IP Blocks
54 * GPUs are composed of IP (intellectual property) blocks. These
55 * IP blocks provide various functionalities: display, graphics,
56 * video decode, etc. The IP blocks that comprise a particular GPU
58 * acquires the list of IP blocks for the GPU in use on initialization.
63 * IP block implementations are named using the following convention:
68 * enum amd_ip_block_type - Used to classify IP blocks by functionality.
80 * @AMD_IP_BLOCK_TYPE_ACP: Audio Co-Processor
82 * @AMD_IP_BLOCK_TYPE_MES: Micro-Engine Scheduler
167  * enum PP_FEATURE_MASK - Used to mask power play features.
183  * @PP_OVERDRIVE_MASK: Over- and under-clocking support.
233  * struct amd_ip_funcs - general hooks for managing amdgpu IP Blocks
234  * @name: Name of IP block
236  *              does not configure hw - Optional
237  * @late_init: sets up late driver/hw state (post hw_init) - Optional
243  * @suspend: handles IP specific hw/sw changes for suspend
244  * @resume: handles IP specific hw/sw changes for resume
245  * @is_idle: returns current IP block idle status
247  * @check_soft_reset: check soft reset the IP block
248  * @pre_soft_reset: pre soft reset the IP block
249  * @soft_reset: soft reset the IP block
250  * @post_soft_reset: post soft reset the IP block
251  * @set_clockgating_state: enable/disable cg for the IP block
252  * @set_powergating_state: enable/disable pg for the IP block
257  * of IP blocks. After acquiring a list of IP blocks for the GPU in use,
258  * the driver can make chip-wide state changes by walking this list and
259  * making calls to hooks from each IP block. This list is ordered to ensure
260  * that the driver initializes the IP blocks in a safe sequence.