236 		RREG32_SOC15(VCN, 0, mmUVD_STATUS))  in vcn_v1_0_hw_fini()
443 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
452 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
454 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
456 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
459 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
467 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
469 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
490 	WREG32_SOC15(VCN, 0, mmUVD_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
492 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
513 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
516 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE);  in vcn_v1_0_disable_clock_gating()
541 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_GATE, data);  in vcn_v1_0_disable_clock_gating()
543 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v1_0_disable_clock_gating()
554 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v1_0_disable_clock_gating()
570 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
577 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
579 	data = RREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE);  in vcn_v1_0_enable_clock_gating()
581 	WREG32_SOC15(VCN, 0, mmJPEG_CGC_GATE, data);  in vcn_v1_0_enable_clock_gating()
584 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
591 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
593 	data = RREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
614 	WREG32_SOC15(VCN, 0, mmUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
616 	data = RREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL);  in vcn_v1_0_enable_clock_gating()
627 	WREG32_SOC15(VCN, 0, mmUVD_SUVD_CGC_CTRL, data);  in vcn_v1_0_enable_clock_gating()
701 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_disable_static_power_gating()
702 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, UVD_PGFSM_STATUS__UVDM_UVDU_PWR_ON, 0xFFFFFF);  in vcn_1_0_disable_static_power_gating()
715 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_disable_static_power_gating()
716 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, 0,  0xFFFFFFFF);  in vcn_1_0_disable_static_power_gating()
721 	data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_1_0_disable_static_power_gating()
726 	WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_1_0_disable_static_power_gating()
735 		data = RREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS);  in vcn_1_0_enable_static_power_gating()
738 		WREG32_SOC15(VCN, 0, mmUVD_POWER_STATUS, data);  in vcn_1_0_enable_static_power_gating()
753 		WREG32_SOC15(VCN, 0, mmUVD_PGFSM_CONFIG, data);  in vcn_1_0_enable_static_power_gating()
766 		SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_PGFSM_STATUS, data, 0xFFFFFFFF);  in vcn_1_0_enable_static_power_gating()
1331 	return (RREG32_SOC15(VCN, 0, mmUVD_STATUS) == UVD_STATUS__IDLE);  in vcn_v1_0_is_idle()
1339 	ret = SOC15_WAIT_ON_RREG(VCN, 0, mmUVD_STATUS, UVD_STATUS__IDLE,  in vcn_v1_0_wait_for_idle()