846 				   struct amdgpu_ib *ib,  in sdma_v4_0_ring_emit_ib()  argument
857 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v4_0_ring_emit_ib()
858 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v4_0_ring_emit_ib()
859 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v4_0_ring_emit_ib()
1583 	struct amdgpu_ib ib;  in sdma_v4_0_ring_test_ib()  local
1597 	memset(&ib, 0, sizeof(ib));  in sdma_v4_0_ring_test_ib()
1599 					AMDGPU_IB_POOL_DIRECT, &ib);  in sdma_v4_0_ring_test_ib()
1603 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_ring_test_ib()
1605 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1606 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v4_0_ring_test_ib()
1607 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0);  in sdma_v4_0_ring_test_ib()
1608 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v4_0_ring_test_ib()
1609 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1610 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1611 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v4_0_ring_test_ib()
1612 	ib.length_dw = 8;  in sdma_v4_0_ring_test_ib()
1614 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v4_0_ring_test_ib()
1632 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v4_0_ring_test_ib()
1650 static void sdma_v4_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v4_0_vm_copy_pte()  argument
1656 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_vm_copy_pte()
1658 	ib->ptr[ib->length_dw++] = bytes - 1;  in sdma_v4_0_vm_copy_pte()
1659 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_vm_copy_pte()
1660 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1661 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v4_0_vm_copy_pte()
1662 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1663 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_copy_pte()
1679 static void sdma_v4_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v4_0_vm_write_pte()  argument
1685 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v4_0_vm_write_pte()
1687 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1688 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_write_pte()
1689 	ib->ptr[ib->length_dw++] = ndw - 1;  in sdma_v4_0_vm_write_pte()
1691 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v4_0_vm_write_pte()
1692 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v4_0_vm_write_pte()
1709 static void sdma_v4_0_vm_set_pte_pde(struct amdgpu_ib *ib,  in sdma_v4_0_vm_set_pte_pde()  argument
1715 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_PTEPDE);  in sdma_v4_0_vm_set_pte_pde()
1716 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v4_0_vm_set_pte_pde()
1717 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v4_0_vm_set_pte_pde()
1718 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v4_0_vm_set_pte_pde()
1719 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v4_0_vm_set_pte_pde()
1720 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v4_0_vm_set_pte_pde()
1721 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v4_0_vm_set_pte_pde()
1722 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v4_0_vm_set_pte_pde()
1723 	ib->ptr[ib->length_dw++] = 0;  in sdma_v4_0_vm_set_pte_pde()
1724 	ib->ptr[ib->length_dw++] = count - 1; /* number of entries */  in sdma_v4_0_vm_set_pte_pde()
1733 static void sdma_v4_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v4_0_ring_pad_ib()  argument
1739 	pad_count = (-ib->length_dw) & 7;  in sdma_v4_0_ring_pad_ib()
1742 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
1746 			ib->ptr[ib->length_dw++] =  in sdma_v4_0_ring_pad_ib()
2503 static void sdma_v4_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_copy_buffer()  argument
2509 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v4_0_emit_copy_buffer()
2512 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_copy_buffer()
2513 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v4_0_emit_copy_buffer()
2514 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2515 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v4_0_emit_copy_buffer()
2516 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2517 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_copy_buffer()
2530 static void sdma_v4_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v4_0_emit_fill_buffer()  argument
2535 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v4_0_emit_fill_buffer()
2536 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2537 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v4_0_emit_fill_buffer()
2538 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v4_0_emit_fill_buffer()
2539 	ib->ptr[ib->length_dw++] = byte_count - 1;  in sdma_v4_0_emit_fill_buffer()