426 				   struct amdgpu_ib *ib,  in sdma_v3_0_ring_emit_ib()  argument
437 	amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);  in sdma_v3_0_ring_emit_ib()
438 	amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));  in sdma_v3_0_ring_emit_ib()
439 	amdgpu_ring_write(ring, ib->length_dw);  in sdma_v3_0_ring_emit_ib()
872 	struct amdgpu_ib ib;  in sdma_v3_0_ring_test_ib()  local
886 	memset(&ib, 0, sizeof(ib));  in sdma_v3_0_ring_test_ib()
888 					AMDGPU_IB_POOL_DIRECT, &ib);  in sdma_v3_0_ring_test_ib()
892 	ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_ring_test_ib()
894 	ib.ptr[1] = lower_32_bits(gpu_addr);  in sdma_v3_0_ring_test_ib()
895 	ib.ptr[2] = upper_32_bits(gpu_addr);  in sdma_v3_0_ring_test_ib()
896 	ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1);  in sdma_v3_0_ring_test_ib()
897 	ib.ptr[4] = 0xDEADBEEF;  in sdma_v3_0_ring_test_ib()
898 	ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
899 	ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
900 	ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP);  in sdma_v3_0_ring_test_ib()
901 	ib.length_dw = 8;  in sdma_v3_0_ring_test_ib()
903 	r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);  in sdma_v3_0_ring_test_ib()
920 	amdgpu_ib_free(adev, &ib, NULL);  in sdma_v3_0_ring_test_ib()
937 static void sdma_v3_0_vm_copy_pte(struct amdgpu_ib *ib,  in sdma_v3_0_vm_copy_pte()  argument
943 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v3_0_vm_copy_pte()
945 	ib->ptr[ib->length_dw++] = bytes;  in sdma_v3_0_vm_copy_pte()
946 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v3_0_vm_copy_pte()
947 	ib->ptr[ib->length_dw++] = lower_32_bits(src);  in sdma_v3_0_vm_copy_pte()
948 	ib->ptr[ib->length_dw++] = upper_32_bits(src);  in sdma_v3_0_vm_copy_pte()
949 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v3_0_vm_copy_pte()
950 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_copy_pte()
964 static void sdma_v3_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v3_0_vm_write_pte()  argument
970 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |  in sdma_v3_0_vm_write_pte()
972 	ib->ptr[ib->length_dw++] = lower_32_bits(pe);  in sdma_v3_0_vm_write_pte()
973 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_write_pte()
974 	ib->ptr[ib->length_dw++] = ndw;  in sdma_v3_0_vm_write_pte()
976 		ib->ptr[ib->length_dw++] = lower_32_bits(value);  in sdma_v3_0_vm_write_pte()
977 		ib->ptr[ib->length_dw++] = upper_32_bits(value);  in sdma_v3_0_vm_write_pte()
994 static void sdma_v3_0_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe,  in sdma_v3_0_vm_set_pte_pde()  argument
999 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE);  in sdma_v3_0_vm_set_pte_pde()
1000 	ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */  in sdma_v3_0_vm_set_pte_pde()
1001 	ib->ptr[ib->length_dw++] = upper_32_bits(pe);  in sdma_v3_0_vm_set_pte_pde()
1002 	ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */  in sdma_v3_0_vm_set_pte_pde()
1003 	ib->ptr[ib->length_dw++] = upper_32_bits(flags);  in sdma_v3_0_vm_set_pte_pde()
1004 	ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */  in sdma_v3_0_vm_set_pte_pde()
1005 	ib->ptr[ib->length_dw++] = upper_32_bits(addr);  in sdma_v3_0_vm_set_pte_pde()
1006 	ib->ptr[ib->length_dw++] = incr; /* increment size */  in sdma_v3_0_vm_set_pte_pde()
1007 	ib->ptr[ib->length_dw++] = 0;  in sdma_v3_0_vm_set_pte_pde()
1008 	ib->ptr[ib->length_dw++] = count; /* number of entries */  in sdma_v3_0_vm_set_pte_pde()
1017 static void sdma_v3_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib)  in sdma_v3_0_ring_pad_ib()  argument
1023 	pad_count = (-ib->length_dw) & 7;  in sdma_v3_0_ring_pad_ib()
1026 			ib->ptr[ib->length_dw++] =  in sdma_v3_0_ring_pad_ib()
1030 			ib->ptr[ib->length_dw++] =  in sdma_v3_0_ring_pad_ib()
1638 static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib,  in sdma_v3_0_emit_copy_buffer()  argument
1644 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) |  in sdma_v3_0_emit_copy_buffer()
1646 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v3_0_emit_copy_buffer()
1647 	ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */  in sdma_v3_0_emit_copy_buffer()
1648 	ib->ptr[ib->length_dw++] = lower_32_bits(src_offset);  in sdma_v3_0_emit_copy_buffer()
1649 	ib->ptr[ib->length_dw++] = upper_32_bits(src_offset);  in sdma_v3_0_emit_copy_buffer()
1650 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v3_0_emit_copy_buffer()
1651 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v3_0_emit_copy_buffer()
1664 static void sdma_v3_0_emit_fill_buffer(struct amdgpu_ib *ib,  in sdma_v3_0_emit_fill_buffer()  argument
1669 	ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL);  in sdma_v3_0_emit_fill_buffer()
1670 	ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset);  in sdma_v3_0_emit_fill_buffer()
1671 	ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset);  in sdma_v3_0_emit_fill_buffer()
1672 	ib->ptr[ib->length_dw++] = src_data;  in sdma_v3_0_emit_fill_buffer()
1673 	ib->ptr[ib->length_dw++] = byte_count;  in sdma_v3_0_emit_fill_buffer()