66 	ih_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_CNTL2);  in force_update_wptr_for_self_int()
67 	ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);  in force_update_wptr_for_self_int()
77 	ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);  in force_update_wptr_for_self_int()
93 	u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);  in navi10_ih_enable_interrupts()
109 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);  in navi10_ih_enable_interrupts()
125 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);  in navi10_ih_enable_interrupts()
150 	u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);  in navi10_ih_disable_interrupts()
170 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);  in navi10_ih_disable_interrupts()
190 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);  in navi10_ih_disable_interrupts()
259 	tmp = RREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_DATA);  in navi10_ih_reroute_ih()
266 	tmp = RREG32_SOC15(OSSSYS, 0, mmIH_CLIENT_CFG_DATA);  in navi10_ih_reroute_ih()
297 	ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL);  in navi10_ih_irq_init()
317 				ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN_Sienna_Cichlid);  in navi10_ih_irq_init()
323 				ih_chicken = RREG32_SOC15(OSSSYS, 0, mmIH_CHICKEN);  in navi10_ih_irq_init()
354 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);  in navi10_ih_irq_init()
383 		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);  in navi10_ih_irq_init()
404 	tmp = RREG32_SOC15(OSSSYS, 0, mmIH_STORM_CLIENT_LIST_CNTL);  in navi10_ih_irq_init()
409 	tmp = RREG32_SOC15(OSSSYS, 0, mmIH_INT_FLOOD_CNTL);  in navi10_ih_irq_init()
769 		def = data = RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL);  in navi10_ih_update_clockgating_state()
808 	if (!RREG32_SOC15(OSSSYS, 0, mmIH_CLK_CTRL))  in navi10_ih_get_clockgating_state()