Lines Matching refs:GC
420 data = RREG32_SOC15(GC, 0, mmCP_MES_CNTL); in mes_v10_1_enable()
422 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable()
425 WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, in mes_v10_1_enable()
429 data = RREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL); in mes_v10_1_enable()
432 WREG32_SOC15(GC, 0, mmCP_MES_DC_OP_CNTL, data); in mes_v10_1_enable()
436 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable()
438 data = RREG32_SOC15(GC, 0, mmCP_MES_CNTL); in mes_v10_1_enable()
444 WREG32_SOC15(GC, 0, mmCP_MES_CNTL, data); in mes_v10_1_enable()
469 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_CNTL, 0); in mes_v10_1_load_microcode()
476 WREG32_SOC15(GC, 0, mmCP_MES_PRGRM_CNTR_START, in mes_v10_1_load_microcode()
480 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_LO, in mes_v10_1_load_microcode()
482 WREG32_SOC15(GC, 0, mmCP_MES_IC_BASE_HI, in mes_v10_1_load_microcode()
486 WREG32_SOC15(GC, 0, mmCP_MES_MIBOUND_LO, 0x1FFFFF); in mes_v10_1_load_microcode()
489 WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_LO, in mes_v10_1_load_microcode()
491 WREG32_SOC15(GC, 0, mmCP_MES_MDBASE_HI, in mes_v10_1_load_microcode()
495 WREG32_SOC15(GC, 0, mmCP_MES_MDBOUND_LO, 0x3FFFF); in mes_v10_1_load_microcode()
500 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode()
503 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL); in mes_v10_1_load_microcode()
510 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode()
513 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data); in mes_v10_1_load_microcode()
520 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid); in mes_v10_1_load_microcode()
523 data = RREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL); in mes_v10_1_load_microcode()
529 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL_Sienna_Cichlid, data); in mes_v10_1_load_microcode()
532 WREG32_SOC15(GC, 0, mmCP_MES_IC_OP_CNTL, data); in mes_v10_1_load_microcode()
614 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_EOP_CONTROL); in mes_v10_1_mqd_init()
621 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); in mes_v10_1_mqd_init()
651 tmp = RREG32_SOC15(GC, 0, mmCP_MQD_CONTROL); in mes_v10_1_mqd_init()
661 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL); in mes_v10_1_mqd_init()
689 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); in mes_v10_1_mqd_init()
705 mqd->cp_hqd_pq_rptr = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR); in mes_v10_1_mqd_init()
710 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE); in mes_v10_1_mqd_init()
715 tmp = RREG32_SOC15(GC, 0, mmCP_HQD_IB_CONTROL); in mes_v10_1_mqd_init()
734 data = RREG32_SOC15(GC, 0, mmCP_HQD_VMID); in mes_v10_1_queue_init_register()
736 WREG32_SOC15(GC, 0, mmCP_HQD_VMID, data); in mes_v10_1_queue_init_register()
739 data = RREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL); in mes_v10_1_queue_init_register()
742 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, data); in mes_v10_1_queue_init_register()
745 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR, mqd->cp_mqd_base_addr_lo); in mes_v10_1_queue_init_register()
746 WREG32_SOC15(GC, 0, mmCP_MQD_BASE_ADDR_HI, mqd->cp_mqd_base_addr_hi); in mes_v10_1_queue_init_register()
749 data = RREG32_SOC15(GC, 0, mmCP_MQD_CONTROL); in mes_v10_1_queue_init_register()
751 WREG32_SOC15(GC, 0, mmCP_MQD_CONTROL, 0); in mes_v10_1_queue_init_register()
754 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE, mqd->cp_hqd_pq_base_lo); in mes_v10_1_queue_init_register()
755 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_BASE_HI, mqd->cp_hqd_pq_base_hi); in mes_v10_1_queue_init_register()
758 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR, in mes_v10_1_queue_init_register()
760 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI, in mes_v10_1_queue_init_register()
764 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control); in mes_v10_1_queue_init_register()
767 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR, in mes_v10_1_queue_init_register()
769 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_POLL_ADDR_HI, in mes_v10_1_queue_init_register()
773 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_DOORBELL_CONTROL, in mes_v10_1_queue_init_register()
777 WREG32_SOC15(GC, 0, mmCP_HQD_PERSISTENT_STATE, mqd->cp_hqd_persistent_state); in mes_v10_1_queue_init_register()
780 WREG32_SOC15(GC, 0, mmCP_HQD_ACTIVE, mqd->cp_hqd_active); in mes_v10_1_queue_init_register()