316 	struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_probe_oui()  local
319 	if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT))  in amdgpu_atombios_dp_probe_oui()
333 	struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_ds_ports()  local
336 	if (dig_connector->dpcd[DP_DPCD_REV] > 0x10) {  in amdgpu_atombios_dp_ds_ports()
339 				       dig_connector->downstream_ports,  in amdgpu_atombios_dp_ds_ports()
342 			memset(dig_connector->downstream_ports, 0,  in amdgpu_atombios_dp_ds_ports()
349 	struct amdgpu_connector_atom_dig *dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_get_dpcd()  local
356 		memcpy(dig_connector->dpcd, msg, DP_DPCD_SIZE);  in amdgpu_atombios_dp_get_dpcd()
358 		DRM_DEBUG_KMS("DPCD: %*ph\n", (int)sizeof(dig_connector->dpcd),  in amdgpu_atombios_dp_get_dpcd()
359 			      dig_connector->dpcd);  in amdgpu_atombios_dp_get_dpcd()
366 	dig_connector->dpcd[0] = 0;  in amdgpu_atombios_dp_get_dpcd()
409 	struct amdgpu_connector_atom_dig *dig_connector;  in amdgpu_atombios_dp_set_link_config()  local
414 	dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_set_link_config()
416 	if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||  in amdgpu_atombios_dp_set_link_config()
417 	    (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {  in amdgpu_atombios_dp_set_link_config()
418 		ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd,  in amdgpu_atombios_dp_set_link_config()
420 							    &dig_connector->dp_lane_count,  in amdgpu_atombios_dp_set_link_config()
421 							    &dig_connector->dp_clock);  in amdgpu_atombios_dp_set_link_config()
423 			dig_connector->dp_clock = 0;  in amdgpu_atombios_dp_set_link_config()
424 			dig_connector->dp_lane_count = 0;  in amdgpu_atombios_dp_set_link_config()
433 	struct amdgpu_connector_atom_dig *dig_connector;  in amdgpu_atombios_dp_mode_valid_helper()  local
439 	dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_mode_valid_helper()
441 	ret = amdgpu_atombios_dp_get_dp_link_config(connector, dig_connector->dpcd,  in amdgpu_atombios_dp_mode_valid_helper()
470 	struct amdgpu_connector_atom_dig *dig_connector;  in amdgpu_atombios_dp_set_rx_power_state()  local
475 	dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_set_rx_power_state()
478 	if (dig_connector->dpcd[0] >= 0x11) {  in amdgpu_atombios_dp_set_rx_power_state()
724 	struct amdgpu_connector_atom_dig *dig_connector;  in amdgpu_atombios_dp_link_train()  local
734 	dig_connector = amdgpu_connector->con_priv;  in amdgpu_atombios_dp_link_train()
736 	if ((dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) &&  in amdgpu_atombios_dp_link_train()
737 	    (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_eDP))  in amdgpu_atombios_dp_link_train()
750 	memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE);  in amdgpu_atombios_dp_link_train()
754 	dp_info.dp_lane_count = dig_connector->dp_lane_count;  in amdgpu_atombios_dp_link_train()
755 	dp_info.dp_clock = dig_connector->dp_clock;  in amdgpu_atombios_dp_link_train()