Lines Matching +full:ati +full:- +full:base
35 #include "atom-names.h"
36 #include "atom-bits.h"
95 while (n--) in debug_print_spaces()
106 static uint32_t atom_iio_execute(struct atom_context *ctx, int base, in atom_iio_execute() argument
112 switch (CU8(base)) { in atom_iio_execute()
114 base++; in atom_iio_execute()
117 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)); in atom_iio_execute()
118 base += 3; in atom_iio_execute()
121 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); in atom_iio_execute()
122 base += 3; in atom_iio_execute()
126 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
127 CU8(base + 2)); in atom_iio_execute()
128 base += 3; in atom_iio_execute()
132 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + in atom_iio_execute()
134 base += 3; in atom_iio_execute()
138 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
139 CU8(base + 3)); in atom_iio_execute()
141 ((index >> CU8(base + 2)) & in atom_iio_execute()
142 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
144 base += 4; in atom_iio_execute()
148 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
149 CU8(base + 3)); in atom_iio_execute()
151 ((data >> CU8(base + 2)) & in atom_iio_execute()
152 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + in atom_iio_execute()
154 base += 4; in atom_iio_execute()
158 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << in atom_iio_execute()
159 CU8(base + 3)); in atom_iio_execute()
161 ((ctx-> in atom_iio_execute()
162 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 - in atom_iio_execute()
164 (base in atom_iio_execute()
167 << CU8(base + 3); in atom_iio_execute()
168 base += 4; in atom_iio_execute()
182 struct atom_context *gctx = ctx->ctx; in atom_get_src_int()
191 idx += gctx->reg_block; in atom_get_src_int()
192 switch (gctx->io_mode) { in atom_get_src_int()
194 val = gctx->card->reg_read(gctx->card, idx); in atom_get_src_int()
203 if (!(gctx->io_mode & 0x80)) { in atom_get_src_int()
207 if (!gctx->iio[gctx->io_mode & 0x7F]) { in atom_get_src_int()
209 gctx->io_mode & 0x7F); in atom_get_src_int()
214 gctx->iio[gctx->io_mode & 0x7F], in atom_get_src_int()
223 val = get_unaligned_le32((u32 *)&ctx->ps[idx]); in atom_get_src_int()
234 val = gctx->divmul[0]; in atom_get_src_int()
237 val = gctx->divmul[1]; in atom_get_src_int()
240 val = gctx->data_block; in atom_get_src_int()
243 val = gctx->shift; in atom_get_src_int()
246 val = 1 << gctx->shift; in atom_get_src_int()
249 val = ~(1 << gctx->shift); in atom_get_src_int()
252 val = gctx->fb_base; in atom_get_src_int()
255 val = gctx->io_attr; in atom_get_src_int()
258 val = gctx->reg_block; in atom_get_src_int()
261 val = ctx->ws[idx]; in atom_get_src_int()
268 if (gctx->data_block) in atom_get_src_int()
269 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block); in atom_get_src_int()
273 val = U32(idx + gctx->data_block); in atom_get_src_int()
278 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_get_src_int()
280 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_get_src_int()
283 val = gctx->scratch[(gctx->fb_base / 4) + idx]; in atom_get_src_int()
319 val = gctx->card->pll_read(gctx->card, idx); in atom_get_src_int()
326 val = gctx->card->mc_read(gctx->card, idx); in atom_get_src_int()
336 DEBUG(".[31:0] -> 0x%08X\n", val); in atom_get_src_int()
339 DEBUG(".[15:0] -> 0x%04X\n", val); in atom_get_src_int()
342 DEBUG(".[23:8] -> 0x%04X\n", val); in atom_get_src_int()
345 DEBUG(".[31:16] -> 0x%04X\n", val); in atom_get_src_int()
348 DEBUG(".[7:0] -> 0x%02X\n", val); in atom_get_src_int()
351 DEBUG(".[15:8] -> 0x%02X\n", val); in atom_get_src_int()
354 DEBUG(".[23:16] -> 0x%02X\n", val); in atom_get_src_int()
357 DEBUG(".[31:24] -> 0x%02X\n", val); in atom_get_src_int()
452 struct atom_context *gctx = ctx->ctx; in atom_put_dst()
463 idx += gctx->reg_block; in atom_put_dst()
464 switch (gctx->io_mode) { in atom_put_dst()
467 gctx->card->reg_write(gctx->card, idx, in atom_put_dst()
470 gctx->card->reg_write(gctx->card, idx, val); in atom_put_dst()
479 if (!(gctx->io_mode & 0x80)) { in atom_put_dst()
483 if (!gctx->iio[gctx->io_mode & 0xFF]) { in atom_put_dst()
485 gctx->io_mode & 0x7F); in atom_put_dst()
488 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], in atom_put_dst()
496 ctx->ps[idx] = cpu_to_le32(val); in atom_put_dst()
504 gctx->divmul[0] = val; in atom_put_dst()
507 gctx->divmul[1] = val; in atom_put_dst()
510 gctx->data_block = val; in atom_put_dst()
513 gctx->shift = val; in atom_put_dst()
519 gctx->fb_base = val; in atom_put_dst()
522 gctx->io_attr = val; in atom_put_dst()
525 gctx->reg_block = val; in atom_put_dst()
528 ctx->ws[idx] = val; in atom_put_dst()
534 if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { in atom_put_dst()
536 gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); in atom_put_dst()
538 gctx->scratch[(gctx->fb_base / 4) + idx] = val; in atom_put_dst()
545 gctx->card->pll_write(gctx->card, idx, val); in atom_put_dst()
551 gctx->card->mc_write(gctx->card, idx, val); in atom_put_dst()
556 DEBUG(".[31:0] <- 0x%08X\n", old_val); in atom_put_dst()
559 DEBUG(".[15:0] <- 0x%04X\n", old_val); in atom_put_dst()
562 DEBUG(".[23:8] <- 0x%04X\n", old_val); in atom_put_dst()
565 DEBUG(".[31:16] <- 0x%04X\n", old_val); in atom_put_dst()
568 DEBUG(".[7:0] <- 0x%02X\n", old_val); in atom_put_dst()
571 DEBUG(".[15:8] <- 0x%02X\n", old_val); in atom_put_dst()
574 DEBUG(".[23:16] <- 0x%02X\n", old_val); in atom_put_dst()
577 DEBUG(".[31:24] <- 0x%02X\n", old_val); in atom_put_dst()
624 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) in atom_op_calltable()
625 r = amdgpu_atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); in atom_op_calltable()
627 ctx->abort = true; in atom_op_calltable()
651 ctx->ctx->cs_equal = (dst == src); in atom_op_compare()
652 ctx->ctx->cs_above = (dst > src); in atom_op_compare()
653 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", in atom_op_compare()
654 ctx->ctx->cs_above ? "GT" : "LE"); in atom_op_compare()
678 ctx->ctx->divmul[0] = dst / src; in atom_op_div()
679 ctx->ctx->divmul[1] = dst % src; in atom_op_div()
681 ctx->ctx->divmul[0] = 0; in atom_op_div()
682 ctx->ctx->divmul[1] = 0; in atom_op_div()
697 val64 |= ((uint64_t)ctx->ctx->divmul[1]) << 32; in atom_op_div32()
699 ctx->ctx->divmul[0] = lower_32_bits(val64); in atom_op_div32()
700 ctx->ctx->divmul[1] = upper_32_bits(val64); in atom_op_div32()
702 ctx->ctx->divmul[0] = 0; in atom_op_div32()
703 ctx->ctx->divmul[1] = 0; in atom_op_div32()
720 execute = ctx->ctx->cs_above; in atom_op_jump()
723 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; in atom_op_jump()
729 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); in atom_op_jump()
732 execute = !ctx->ctx->cs_above; in atom_op_jump()
735 execute = ctx->ctx->cs_equal; in atom_op_jump()
738 execute = !ctx->ctx->cs_equal; in atom_op_jump()
745 if (ctx->last_jump == (ctx->start + target)) { in atom_op_jump()
747 if (time_after(cjiffies, ctx->last_jump_jiffies)) { in atom_op_jump()
748 cjiffies -= ctx->last_jump_jiffies; in atom_op_jump()
752 ctx->abort = true; in atom_op_jump()
756 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
759 ctx->last_jump = ctx->start + target; in atom_op_jump()
760 ctx->last_jump_jiffies = jiffies; in atom_op_jump()
762 *ptr = ctx->start + target; in atom_op_jump()
808 ctx->ctx->divmul[0] = dst * src; in atom_op_mul()
821 ctx->ctx->divmul[0] = lower_32_bits(val64); in atom_op_mul32()
822 ctx->ctx->divmul[1] = upper_32_bits(val64); in atom_op_mul32()
871 ctx->ctx->data_block = 0; in atom_op_setdatablock()
873 ctx->ctx->data_block = ctx->start; in atom_op_setdatablock()
875 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); in atom_op_setdatablock()
876 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block); in atom_op_setdatablock()
883 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); in atom_op_setfbbase()
897 ctx->ctx->io_mode = ATOM_IO_MM; in atom_op_setport()
899 ctx->ctx->io_mode = ATOM_IO_IIO | port; in atom_op_setport()
903 ctx->ctx->io_mode = ATOM_IO_PCI; in atom_op_setport()
907 ctx->ctx->io_mode = ATOM_IO_SYSIO; in atom_op_setport()
915 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
917 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
999 dst -= src; in atom_op_sub()
1020 *ptr = ctx->start + target; in atom_op_switch()
1039 ctx->ctx->cs_equal = ((dst & src) == 0); in atom_op_test()
1040 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); in atom_op_test()
1206 int base = CU16(ctx->cmd_table + 4 + 2 * index); in amdgpu_atom_execute_table_locked() local
1212 if (!base) in amdgpu_atom_execute_table_locked()
1213 return -EINVAL; in amdgpu_atom_execute_table_locked()
1215 len = CU16(base + ATOM_CT_SIZE_PTR); in amdgpu_atom_execute_table_locked()
1216 ws = CU8(base + ATOM_CT_WS_PTR); in amdgpu_atom_execute_table_locked()
1217 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK; in amdgpu_atom_execute_table_locked()
1218 ptr = base + ATOM_CT_CODE_PTR; in amdgpu_atom_execute_table_locked()
1220 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); in amdgpu_atom_execute_table_locked()
1224 ectx.start = base; in amdgpu_atom_execute_table_locked()
1237 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); in amdgpu_atom_execute_table_locked()
1239 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1); in amdgpu_atom_execute_table_locked()
1242 base, len, ws, ps, ptr - 1); in amdgpu_atom_execute_table_locked()
1243 ret = -EINVAL; in amdgpu_atom_execute_table_locked()
1256 debug_depth--; in amdgpu_atom_execute_table_locked()
1269 mutex_lock(&ctx->mutex); in amdgpu_atom_execute_table()
1271 ctx->data_block = 0; in amdgpu_atom_execute_table()
1273 ctx->reg_block = 0; in amdgpu_atom_execute_table()
1275 ctx->fb_base = 0; in amdgpu_atom_execute_table()
1277 ctx->io_mode = ATOM_IO_MM; in amdgpu_atom_execute_table()
1279 ctx->divmul[0] = 0; in amdgpu_atom_execute_table()
1280 ctx->divmul[1] = 0; in amdgpu_atom_execute_table()
1282 mutex_unlock(&ctx->mutex); in amdgpu_atom_execute_table()
1288 static void atom_index_iio(struct atom_context *ctx, int base) in atom_index_iio() argument
1290 ctx->iio = kzalloc(2 * 256, GFP_KERNEL); in atom_index_iio()
1291 if (!ctx->iio) in atom_index_iio()
1293 while (CU8(base) == ATOM_IIO_START) { in atom_index_iio()
1294 ctx->iio[CU8(base + 1)] = base + 2; in atom_index_iio()
1295 base += 2; in atom_index_iio()
1296 while (CU8(base) != ATOM_IIO_END) in atom_index_iio()
1297 base += atom_iio_len[CU8(base)]; in atom_index_iio()
1298 base += 3; in atom_index_iio()
1304 int base; in amdgpu_atom_parse() local
1313 ctx->card = card; in amdgpu_atom_parse()
1314 ctx->bios = bios; in amdgpu_atom_parse()
1324 pr_info("Invalid ATI magic\n"); in amdgpu_atom_parse()
1329 base = CU16(ATOM_ROM_TABLE_PTR); in amdgpu_atom_parse()
1331 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, in amdgpu_atom_parse()
1338 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); in amdgpu_atom_parse()
1339 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); in amdgpu_atom_parse()
1340 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); in amdgpu_atom_parse()
1341 if (!ctx->iio) { in amdgpu_atom_parse()
1353 strlcpy(ctx->vbios_version, str, sizeof(ctx->vbios_version)); in amdgpu_atom_parse()
1362 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); in amdgpu_atom_asic_init()
1373 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) in amdgpu_atom_asic_init()
1386 kfree(ctx->iio); in amdgpu_atom_destroy()
1395 int idx = CU16(ctx->data_table + offset); in amdgpu_atom_parse_data_header()
1396 u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); in amdgpu_atom_parse_data_header()
1415 int idx = CU16(ctx->cmd_table + offset); in amdgpu_atom_parse_cmd_header()
1416 u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); in amdgpu_atom_parse_cmd_header()