Lines Matching refs:ib_idx

586 static int amdgpu_vce_validate_bo(struct amdgpu_cs_parser *p, uint32_t ib_idx,  in amdgpu_vce_validate_bo()  argument
597 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | in amdgpu_vce_validate_bo()
598 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32; in amdgpu_vce_validate_bo()
634 static int amdgpu_vce_cs_reloc(struct amdgpu_cs_parser *p, uint32_t ib_idx, in amdgpu_vce_cs_reloc() argument
645 addr = ((uint64_t)amdgpu_get_ib_value(p, ib_idx, lo)) | in amdgpu_vce_cs_reloc()
646 ((uint64_t)amdgpu_get_ib_value(p, ib_idx, hi)) << 32; in amdgpu_vce_cs_reloc()
667 amdgpu_set_ib_value(p, ib_idx, lo, lower_32_bits(addr)); in amdgpu_vce_cs_reloc()
668 amdgpu_set_ib_value(p, ib_idx, hi, upper_32_bits(addr)); in amdgpu_vce_cs_reloc()
719 int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx) in amdgpu_vce_ring_parse_cs() argument
721 struct amdgpu_ib *ib = &p->job->ibs[ib_idx]; in amdgpu_vce_ring_parse_cs()
736 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs()
737 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs()
747 fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6); in amdgpu_vce_ring_parse_cs()
748 bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7); in amdgpu_vce_ring_parse_cs()
752 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 10, in amdgpu_vce_ring_parse_cs()
757 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 12, in amdgpu_vce_ring_parse_cs()
764 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
771 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4); in amdgpu_vce_ring_parse_cs()
772 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
779 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
786 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
791 r = amdgpu_vce_validate_bo(p, ib_idx, idx + 8, in amdgpu_vce_ring_parse_cs()
802 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs()
803 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs()
807 handle = amdgpu_get_ib_value(p, ib_idx, idx + 2); in amdgpu_vce_ring_parse_cs()
818 fb_idx = amdgpu_get_ib_value(p, ib_idx, idx + 6); in amdgpu_vce_ring_parse_cs()
819 bs_idx = amdgpu_get_ib_value(p, ib_idx, idx + 7); in amdgpu_vce_ring_parse_cs()
834 *size = amdgpu_get_ib_value(p, ib_idx, idx + 8) * in amdgpu_vce_ring_parse_cs()
835 amdgpu_get_ib_value(p, ib_idx, idx + 10) * in amdgpu_vce_ring_parse_cs()
864 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9, in amdgpu_vce_ring_parse_cs()
869 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 12, idx + 11, in amdgpu_vce_ring_parse_cs()
880 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
887 tmp = amdgpu_get_ib_value(p, ib_idx, idx + 4); in amdgpu_vce_ring_parse_cs()
888 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
895 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, idx + 2, in amdgpu_vce_ring_parse_cs()
902 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 3, in amdgpu_vce_ring_parse_cs()
907 r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 8, in amdgpu_vce_ring_parse_cs()
955 int amdgpu_vce_ring_parse_cs_vm(struct amdgpu_cs_parser *p, uint32_t ib_idx) in amdgpu_vce_ring_parse_cs_vm() argument
957 struct amdgpu_ib *ib = &p->job->ibs[ib_idx]; in amdgpu_vce_ring_parse_cs_vm()
966 uint32_t len = amdgpu_get_ib_value(p, ib_idx, idx); in amdgpu_vce_ring_parse_cs_vm()
967 uint32_t cmd = amdgpu_get_ib_value(p, ib_idx, idx + 1); in amdgpu_vce_ring_parse_cs_vm()
977 handle = amdgpu_get_ib_value(p, ib_idx, idx + 2); in amdgpu_vce_ring_parse_cs_vm()