243 		fw_info->ver = adev->gfx.me_fw_version;  in amdgpu_firmware_info()
244 		fw_info->feature = adev->gfx.me_feature_version;  in amdgpu_firmware_info()
247 		fw_info->ver = adev->gfx.pfp_fw_version;  in amdgpu_firmware_info()
248 		fw_info->feature = adev->gfx.pfp_feature_version;  in amdgpu_firmware_info()
251 		fw_info->ver = adev->gfx.ce_fw_version;  in amdgpu_firmware_info()
252 		fw_info->feature = adev->gfx.ce_feature_version;  in amdgpu_firmware_info()
255 		fw_info->ver = adev->gfx.rlc_fw_version;  in amdgpu_firmware_info()
256 		fw_info->feature = adev->gfx.rlc_feature_version;  in amdgpu_firmware_info()
259 		fw_info->ver = adev->gfx.rlc_srlc_fw_version;  in amdgpu_firmware_info()
260 		fw_info->feature = adev->gfx.rlc_srlc_feature_version;  in amdgpu_firmware_info()
263 		fw_info->ver = adev->gfx.rlc_srlg_fw_version;  in amdgpu_firmware_info()
264 		fw_info->feature = adev->gfx.rlc_srlg_feature_version;  in amdgpu_firmware_info()
267 		fw_info->ver = adev->gfx.rlc_srls_fw_version;  in amdgpu_firmware_info()
268 		fw_info->feature = adev->gfx.rlc_srls_feature_version;  in amdgpu_firmware_info()
272 			fw_info->ver = adev->gfx.mec_fw_version;  in amdgpu_firmware_info()
273 			fw_info->feature = adev->gfx.mec_feature_version;  in amdgpu_firmware_info()
275 			fw_info->ver = adev->gfx.mec2_fw_version;  in amdgpu_firmware_info()
276 			fw_info->feature = adev->gfx.mec2_feature_version;  in amdgpu_firmware_info()
350 		for (i = 0; i < adev->gfx.num_gfx_rings; i++)  in amdgpu_hw_ip_info()
351 			if (adev->gfx.gfx_ring[i].sched.ready)  in amdgpu_hw_ip_info()
358 		for (i = 0; i < adev->gfx.num_compute_rings; i++)  in amdgpu_hw_ip_info()
359 			if (adev->gfx.compute_ring[i].sched.ready)  in amdgpu_hw_ip_info()
729 		dev_info.num_shader_engines = adev->gfx.config.max_shader_engines;  in amdgpu_info_ioctl()
730 		dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;  in amdgpu_info_ioctl()
740 		dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;  in amdgpu_info_ioctl()
741 		dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *  in amdgpu_info_ioctl()
742 			adev->gfx.config.max_shader_engines;  in amdgpu_info_ioctl()
743 		dev_info.num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts;  in amdgpu_info_ioctl()
772 		dev_info.cu_active_number = adev->gfx.cu_info.number;  in amdgpu_info_ioctl()
773 		dev_info.cu_ao_mask = adev->gfx.cu_info.ao_cu_mask;  in amdgpu_info_ioctl()
774 		dev_info.ce_ram_size = adev->gfx.ce_ram_size;  in amdgpu_info_ioctl()
775 		memcpy(&dev_info.cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0],  in amdgpu_info_ioctl()
776 		       sizeof(adev->gfx.cu_info.ao_cu_bitmap));  in amdgpu_info_ioctl()
777 		memcpy(&dev_info.cu_bitmap[0], &adev->gfx.cu_info.bitmap[0],  in amdgpu_info_ioctl()
778 		       sizeof(adev->gfx.cu_info.bitmap));  in amdgpu_info_ioctl()
783 			adev->gfx.config.double_offchip_lds_buf;  in amdgpu_info_ioctl()
784 		dev_info.wave_front_size = adev->gfx.cu_info.wave_front_size;  in amdgpu_info_ioctl()
785 		dev_info.num_shader_visible_vgprs = adev->gfx.config.max_gprs;  in amdgpu_info_ioctl()
786 		dev_info.num_cu_per_sh = adev->gfx.config.max_cu_per_sh;  in amdgpu_info_ioctl()
787 		dev_info.num_tcc_blocks = adev->gfx.config.max_texture_channel_caches;  in amdgpu_info_ioctl()
788 		dev_info.gs_vgt_table_depth = adev->gfx.config.gs_vgt_table_depth;  in amdgpu_info_ioctl()
789 		dev_info.gs_prim_buffer_depth = adev->gfx.config.gs_prim_buffer_depth;  in amdgpu_info_ioctl()
790 		dev_info.max_gs_waves_per_vgt = adev->gfx.config.max_gs_threads;  in amdgpu_info_ioctl()
794 				adev->gfx.config.pa_sc_tile_steering_override;  in amdgpu_info_ioctl()
796 		dev_info.tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask;  in amdgpu_info_ioctl()
1372 	if (adev->gfx.mec2_fw) {  in amdgpu_debugfs_firmware_info()