698 	uint32_t *config, no_regs = 0;  in amdgpu_debugfs_gca_config_read()  local
708 	config[no_regs++] = 3;  in amdgpu_debugfs_gca_config_read()
709 	config[no_regs++] = adev->gfx.config.max_shader_engines;  in amdgpu_debugfs_gca_config_read()
710 	config[no_regs++] = adev->gfx.config.max_tile_pipes;  in amdgpu_debugfs_gca_config_read()
711 	config[no_regs++] = adev->gfx.config.max_cu_per_sh;  in amdgpu_debugfs_gca_config_read()
712 	config[no_regs++] = adev->gfx.config.max_sh_per_se;  in amdgpu_debugfs_gca_config_read()
713 	config[no_regs++] = adev->gfx.config.max_backends_per_se;  in amdgpu_debugfs_gca_config_read()
714 	config[no_regs++] = adev->gfx.config.max_texture_channel_caches;  in amdgpu_debugfs_gca_config_read()
715 	config[no_regs++] = adev->gfx.config.max_gprs;  in amdgpu_debugfs_gca_config_read()
716 	config[no_regs++] = adev->gfx.config.max_gs_threads;  in amdgpu_debugfs_gca_config_read()
717 	config[no_regs++] = adev->gfx.config.max_hw_contexts;  in amdgpu_debugfs_gca_config_read()
718 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend;  in amdgpu_debugfs_gca_config_read()
719 	config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_backend;  in amdgpu_debugfs_gca_config_read()
720 	config[no_regs++] = adev->gfx.config.sc_hiz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
721 	config[no_regs++] = adev->gfx.config.sc_earlyz_tile_fifo_size;  in amdgpu_debugfs_gca_config_read()
722 	config[no_regs++] = adev->gfx.config.num_tile_pipes;  in amdgpu_debugfs_gca_config_read()
723 	config[no_regs++] = adev->gfx.config.backend_enable_mask;  in amdgpu_debugfs_gca_config_read()
724 	config[no_regs++] = adev->gfx.config.mem_max_burst_length_bytes;  in amdgpu_debugfs_gca_config_read()
725 	config[no_regs++] = adev->gfx.config.mem_row_size_in_kb;  in amdgpu_debugfs_gca_config_read()
726 	config[no_regs++] = adev->gfx.config.shader_engine_tile_size;  in amdgpu_debugfs_gca_config_read()
727 	config[no_regs++] = adev->gfx.config.num_gpus;  in amdgpu_debugfs_gca_config_read()
728 	config[no_regs++] = adev->gfx.config.multi_gpu_tile_size;  in amdgpu_debugfs_gca_config_read()
729 	config[no_regs++] = adev->gfx.config.mc_arb_ramcfg;  in amdgpu_debugfs_gca_config_read()
730 	config[no_regs++] = adev->gfx.config.gb_addr_config;  in amdgpu_debugfs_gca_config_read()
731 	config[no_regs++] = adev->gfx.config.num_rbs;  in amdgpu_debugfs_gca_config_read()
734 	config[no_regs++] = adev->rev_id;  in amdgpu_debugfs_gca_config_read()
735 	config[no_regs++] = adev->pg_flags;  in amdgpu_debugfs_gca_config_read()
736 	config[no_regs++] = adev->cg_flags;  in amdgpu_debugfs_gca_config_read()
739 	config[no_regs++] = adev->family;  in amdgpu_debugfs_gca_config_read()
740 	config[no_regs++] = adev->external_rev_id;  in amdgpu_debugfs_gca_config_read()
743 	config[no_regs++] = adev->pdev->device;  in amdgpu_debugfs_gca_config_read()
744 	config[no_regs++] = adev->pdev->revision;  in amdgpu_debugfs_gca_config_read()
745 	config[no_regs++] = adev->pdev->subsystem_device;  in amdgpu_debugfs_gca_config_read()
746 	config[no_regs++] = adev->pdev->subsystem_vendor;  in amdgpu_debugfs_gca_config_read()
748 	while (size && (*pos < no_regs * 4)) {  in amdgpu_debugfs_gca_config_read()