205 		se_bank = (*pos & GENMASK_ULL(33, 24)) >> 24;  in amdgpu_debugfs_process_reg_op()
206 		sh_bank = (*pos & GENMASK_ULL(43, 34)) >> 34;  in amdgpu_debugfs_process_reg_op()
207 		instance_bank = (*pos & GENMASK_ULL(53, 44)) >> 44;  in amdgpu_debugfs_process_reg_op()
218 		me = (*pos & GENMASK_ULL(33, 24)) >> 24;  in amdgpu_debugfs_process_reg_op()
219 		pipe = (*pos & GENMASK_ULL(43, 34)) >> 34;  in amdgpu_debugfs_process_reg_op()
220 		queue = (*pos & GENMASK_ULL(53, 44)) >> 44;  in amdgpu_debugfs_process_reg_op()
221 		vmid = (*pos & GENMASK_ULL(58, 54)) >> 54;  in amdgpu_debugfs_process_reg_op()
874 	offset = (*pos & GENMASK_ULL(6, 0));  in amdgpu_debugfs_wave_read()
875 	se = (*pos & GENMASK_ULL(14, 7)) >> 7;  in amdgpu_debugfs_wave_read()
876 	sh = (*pos & GENMASK_ULL(22, 15)) >> 15;  in amdgpu_debugfs_wave_read()
877 	cu = (*pos & GENMASK_ULL(30, 23)) >> 23;  in amdgpu_debugfs_wave_read()
878 	wave = (*pos & GENMASK_ULL(36, 31)) >> 31;  in amdgpu_debugfs_wave_read()
879 	simd = (*pos & GENMASK_ULL(44, 37)) >> 37;  in amdgpu_debugfs_wave_read()
966 	offset = (*pos & GENMASK_ULL(11, 0)) >> 2;  in amdgpu_debugfs_gpr_read()
967 	se = (*pos & GENMASK_ULL(19, 12)) >> 12;  in amdgpu_debugfs_gpr_read()
968 	sh = (*pos & GENMASK_ULL(27, 20)) >> 20;  in amdgpu_debugfs_gpr_read()
969 	cu = (*pos & GENMASK_ULL(35, 28)) >> 28;  in amdgpu_debugfs_gpr_read()
970 	wave = (*pos & GENMASK_ULL(43, 36)) >> 36;  in amdgpu_debugfs_gpr_read()
971 	simd = (*pos & GENMASK_ULL(51, 44)) >> 44;  in amdgpu_debugfs_gpr_read()
972 	thread = (*pos & GENMASK_ULL(59, 52)) >> 52;  in amdgpu_debugfs_gpr_read()
973 	bank = (*pos & GENMASK_ULL(61, 60)) >> 60;  in amdgpu_debugfs_gpr_read()