115 static void wcove_update_irq_mask(struct wcove_gpio *wg, int gpio)  in wcove_update_irq_mask()  argument
127 	if (wg->set_irq_mask)  in wcove_update_irq_mask()
128 		regmap_update_bits(wg->regmap, reg, mask, mask);  in wcove_update_irq_mask()
130 		regmap_update_bits(wg->regmap, reg, mask, 0);  in wcove_update_irq_mask()
133 static void wcove_update_irq_ctrl(struct wcove_gpio *wg, int gpio)  in wcove_update_irq_ctrl()  argument
140 	regmap_update_bits(wg->regmap, reg, CTLI_INTCNT_BE, wg->intcnt);  in wcove_update_irq_ctrl()
145 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_dir_in()  local
151 	return regmap_write(wg->regmap, reg, CTLO_INPUT_SET);  in wcove_gpio_dir_in()
157 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_dir_out()  local
163 	return regmap_write(wg->regmap, reg, CTLO_OUTPUT_SET | value);  in wcove_gpio_dir_out()
168 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_get_direction()  local
175 	ret = regmap_read(wg->regmap, reg, &val);  in wcove_gpio_get_direction()
187 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_get()  local
194 	ret = regmap_read(wg->regmap, reg, &val);  in wcove_gpio_get()
203 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_set()  local
210 		regmap_update_bits(wg->regmap, reg, 1, 1);  in wcove_gpio_set()
212 		regmap_update_bits(wg->regmap, reg, 1, 0);  in wcove_gpio_set()
218 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_set_config()  local
226 		return regmap_update_bits(wg->regmap, reg, CTLO_DRV_MASK,  in wcove_gpio_set_config()
229 		return regmap_update_bits(wg->regmap, reg, CTLO_DRV_MASK,  in wcove_gpio_set_config()
241 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_irq_type()  local
248 		wg->intcnt = CTLI_INTCNT_DIS;  in wcove_irq_type()
251 		wg->intcnt = CTLI_INTCNT_BE;  in wcove_irq_type()
254 		wg->intcnt = CTLI_INTCNT_PE;  in wcove_irq_type()
257 		wg->intcnt = CTLI_INTCNT_NE;  in wcove_irq_type()
263 	wg->update |= UPDATE_IRQ_TYPE;  in wcove_irq_type()
271 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_bus_lock()  local
273 	mutex_lock(&wg->buslock);  in wcove_bus_lock()
279 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_bus_sync_unlock()  local
282 	if (wg->update & UPDATE_IRQ_TYPE)  in wcove_bus_sync_unlock()
283 		wcove_update_irq_ctrl(wg, gpio);  in wcove_bus_sync_unlock()
284 	if (wg->update & UPDATE_IRQ_MASK)  in wcove_bus_sync_unlock()
285 		wcove_update_irq_mask(wg, gpio);  in wcove_bus_sync_unlock()
286 	wg->update = 0;  in wcove_bus_sync_unlock()
288 	mutex_unlock(&wg->buslock);  in wcove_bus_sync_unlock()
294 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_irq_unmask()  local
299 	wg->set_irq_mask = false;  in wcove_irq_unmask()
300 	wg->update |= UPDATE_IRQ_MASK;  in wcove_irq_unmask()
306 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_irq_mask()  local
311 	wg->set_irq_mask = true;  in wcove_irq_mask()
312 	wg->update |= UPDATE_IRQ_MASK;  in wcove_irq_mask()
326 	struct wcove_gpio *wg = (struct wcove_gpio *)data;  in wcove_gpio_irq_handler()  local
330 	if (regmap_bulk_read(wg->regmap, IRQ_STATUS_BASE, p, 2)) {  in wcove_gpio_irq_handler()
331 		dev_err(wg->dev, "Failed to read irq status register\n");  in wcove_gpio_irq_handler()
347 			virq = irq_find_mapping(wg->chip.irq.domain, gpio);  in wcove_gpio_irq_handler()
349 			regmap_update_bits(wg->regmap, IRQ_STATUS_BASE + offset,  in wcove_gpio_irq_handler()
354 		if (regmap_bulk_read(wg->regmap, IRQ_STATUS_BASE, p, 2)) {  in wcove_gpio_irq_handler()
355 			dev_err(wg->dev, "Failed to read irq status\n");  in wcove_gpio_irq_handler()
369 	struct wcove_gpio *wg = gpiochip_get_data(chip);  in wcove_gpio_dbg_show()  local
374 		ret += regmap_read(wg->regmap, to_reg(gpio, CTRL_OUT), &ctlo);  in wcove_gpio_dbg_show()
375 		ret += regmap_read(wg->regmap, to_reg(gpio, CTRL_IN), &ctli);  in wcove_gpio_dbg_show()
376 		ret += regmap_read(wg->regmap, IRQ_MASK_BASE + group,  in wcove_gpio_dbg_show()
378 		ret += regmap_read(wg->regmap, IRQ_STATUS_BASE + group,  in wcove_gpio_dbg_show()
400 	struct wcove_gpio *wg;  in wcove_gpio_probe()  local
422 	wg = devm_kzalloc(dev, sizeof(*wg), GFP_KERNEL);  in wcove_gpio_probe()
423 	if (!wg)  in wcove_gpio_probe()
426 	wg->regmap_irq_chip = pmic->irq_chip_data;  in wcove_gpio_probe()
428 	platform_set_drvdata(pdev, wg);  in wcove_gpio_probe()
430 	mutex_init(&wg->buslock);  in wcove_gpio_probe()
431 	wg->chip.label = KBUILD_MODNAME;  in wcove_gpio_probe()
432 	wg->chip.direction_input = wcove_gpio_dir_in;  in wcove_gpio_probe()
433 	wg->chip.direction_output = wcove_gpio_dir_out;  in wcove_gpio_probe()
434 	wg->chip.get_direction = wcove_gpio_get_direction;  in wcove_gpio_probe()
435 	wg->chip.get = wcove_gpio_get;  in wcove_gpio_probe()
436 	wg->chip.set = wcove_gpio_set;  in wcove_gpio_probe()
437 	wg->chip.set_config = wcove_gpio_set_config,  in wcove_gpio_probe()
438 	wg->chip.base = -1;  in wcove_gpio_probe()
439 	wg->chip.ngpio = WCOVE_VGPIO_NUM;  in wcove_gpio_probe()
440 	wg->chip.can_sleep = true;  in wcove_gpio_probe()
441 	wg->chip.parent = pdev->dev.parent;  in wcove_gpio_probe()
442 	wg->chip.dbg_show = wcove_gpio_dbg_show;  in wcove_gpio_probe()
443 	wg->dev = dev;  in wcove_gpio_probe()
444 	wg->regmap = pmic->regmap;  in wcove_gpio_probe()
446 	virq = regmap_irq_get_virq(wg->regmap_irq_chip, irq);  in wcove_gpio_probe()
452 	girq = &wg->chip.irq;  in wcove_gpio_probe()
463 					IRQF_ONESHOT, pdev->name, wg);  in wcove_gpio_probe()
469 	ret = devm_gpiochip_add_data(dev, &wg->chip, wg);  in wcove_gpio_probe()
476 	ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE, GPIO_IRQ0_MASK,  in wcove_gpio_probe()
482 	ret = regmap_update_bits(wg->regmap, IRQ_MASK_BASE + 1, GPIO_IRQ1_MASK,  in wcove_gpio_probe()