1 // SPDX-License-Identifier: GPL-2.0-only
3  * GPIO driver for the Diamond Systems GPIO-MM
6  * This driver supports the following Diamond Systems devices: GPIO-MM and
7  * GPIO-MM-12.
28 MODULE_PARM_DESC(base, "Diamond Systems GPIO-MM base addresses");
31  * struct gpiomm_gpio - GPIO device private data structure
37  * @base:	base port address of the GPIO device
52 	const unsigned int port = offset / 8;  in gpiomm_gpio_get_direction()  local
55 	if (gpiommgpio->io_state[port] & mask)  in gpiomm_gpio_get_direction()
67 	const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;  in gpiomm_gpio_direction_input()
71 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_input()
73 	/* Check if configuring Port C */  in gpiomm_gpio_direction_input()
75 		/* Port C can be configured by nibble */  in gpiomm_gpio_direction_input()
77 			gpiommgpio->io_state[io_port] |= 0xF0;  in gpiomm_gpio_direction_input()
78 			gpiommgpio->control[control_port] |= BIT(3);  in gpiomm_gpio_direction_input()
80 			gpiommgpio->io_state[io_port] |= 0x0F;  in gpiomm_gpio_direction_input()
81 			gpiommgpio->control[control_port] |= BIT(0);  in gpiomm_gpio_direction_input()
84 		gpiommgpio->io_state[io_port] |= 0xFF;  in gpiomm_gpio_direction_input()
86 			gpiommgpio->control[control_port] |= BIT(4);  in gpiomm_gpio_direction_input()
88 			gpiommgpio->control[control_port] |= BIT(1);  in gpiomm_gpio_direction_input()
91 	control = BIT(7) | gpiommgpio->control[control_port];  in gpiomm_gpio_direction_input()
94 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_input()
106 	const unsigned int control_addr = gpiommgpio->base + 3 + control_port*4;  in gpiomm_gpio_direction_output()
107 	const unsigned int out_port = (io_port > 2) ? io_port + 1 : io_port;  in gpiomm_gpio_direction_output()
111 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_output()
113 	/* Check if configuring Port C */  in gpiomm_gpio_direction_output()
115 		/* Port C can be configured by nibble */  in gpiomm_gpio_direction_output()
117 			gpiommgpio->io_state[io_port] &= 0x0F;  in gpiomm_gpio_direction_output()
118 			gpiommgpio->control[control_port] &= ~BIT(3);  in gpiomm_gpio_direction_output()
120 			gpiommgpio->io_state[io_port] &= 0xF0;  in gpiomm_gpio_direction_output()
121 			gpiommgpio->control[control_port] &= ~BIT(0);  in gpiomm_gpio_direction_output()
124 		gpiommgpio->io_state[io_port] &= 0x00;  in gpiomm_gpio_direction_output()
126 			gpiommgpio->control[control_port] &= ~BIT(4);  in gpiomm_gpio_direction_output()
128 			gpiommgpio->control[control_port] &= ~BIT(1);  in gpiomm_gpio_direction_output()
132 		gpiommgpio->out_state[io_port] |= mask;  in gpiomm_gpio_direction_output()
134 		gpiommgpio->out_state[io_port] &= ~mask;  in gpiomm_gpio_direction_output()
136 	control = BIT(7) | gpiommgpio->control[control_port];  in gpiomm_gpio_direction_output()
139 	outb(gpiommgpio->out_state[io_port], gpiommgpio->base + out_port);  in gpiomm_gpio_direction_output()
141 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_direction_output()
149 	const unsigned int port = offset / 8;  in gpiomm_gpio_get()  local
151 	const unsigned int in_port = (port > 2) ? port + 1 : port;  in gpiomm_gpio_get()
155 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
158 	if (!(gpiommgpio->io_state[port] & mask)) {  in gpiomm_gpio_get()
159 		spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
160 		return -EINVAL;  in gpiomm_gpio_get()
163 	port_state = inb(gpiommgpio->base + in_port);  in gpiomm_gpio_get()
165 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_get()
170 static const size_t ports[] = { 0, 1, 2, 4, 5, 6 };
182 	bitmap_zero(bits, chip->ngpio);  in gpiomm_gpio_get_multiple()
185 		port_addr = gpiommgpio->base + ports[offset / 8];  in gpiomm_gpio_get_multiple()
198 	const unsigned int port = offset / 8;  in gpiomm_gpio_set()  local
200 	const unsigned int out_port = (port > 2) ? port + 1 : port;  in gpiomm_gpio_set()
203 	spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_set()
206 		gpiommgpio->out_state[port] |= mask;  in gpiomm_gpio_set()
208 		gpiommgpio->out_state[port] &= ~mask;  in gpiomm_gpio_set()
210 	outb(gpiommgpio->out_state[port], gpiommgpio->base + out_port);  in gpiomm_gpio_set()
212 	spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_set()
228 		port_addr = gpiommgpio->base + ports[index];  in gpiomm_gpio_set_multiple()
232 		spin_lock_irqsave(&gpiommgpio->lock, flags);  in gpiomm_gpio_set_multiple()
235 		gpiommgpio->out_state[index] &= ~gpio_mask;  in gpiomm_gpio_set_multiple()
236 		gpiommgpio->out_state[index] |= bitmask;  in gpiomm_gpio_set_multiple()
237 		outb(gpiommgpio->out_state[index], port_addr);  in gpiomm_gpio_set_multiple()
239 		spin_unlock_irqrestore(&gpiommgpio->lock, flags);  in gpiomm_gpio_set_multiple()
245 	"Port 1A0", "Port 1A1", "Port 1A2", "Port 1A3", "Port 1A4", "Port 1A5",
246 	"Port 1A6", "Port 1A7", "Port 1B0", "Port 1B1", "Port 1B2", "Port 1B3",
247 	"Port 1B4", "Port 1B5", "Port 1B6", "Port 1B7", "Port 1C0", "Port 1C1",
248 	"Port 1C2", "Port 1C3", "Port 1C4", "Port 1C5", "Port 1C6", "Port 1C7",
249 	"Port 2A0", "Port 2A1", "Port 2A2", "Port 2A3", "Port 2A4", "Port 2A5",
250 	"Port 2A6", "Port 2A7", "Port 2B0", "Port 2B1", "Port 2B2", "Port 2B3",
251 	"Port 2B4", "Port 2B5", "Port 2B6", "Port 2B7", "Port 2C0", "Port 2C1",
252 	"Port 2C2", "Port 2C3", "Port 2C4", "Port 2C5", "Port 2C6", "Port 2C7",
263 		return -ENOMEM;  in gpiomm_probe()
266 		dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",  in gpiomm_probe()
268 		return -EBUSY;  in gpiomm_probe()
271 	gpiommgpio->chip.label = name;  in gpiomm_probe()
272 	gpiommgpio->chip.parent = dev;  in gpiomm_probe()
273 	gpiommgpio->chip.owner = THIS_MODULE;  in gpiomm_probe()
274 	gpiommgpio->chip.base = -1;  in gpiomm_probe()
275 	gpiommgpio->chip.ngpio = GPIOMM_NGPIO;  in gpiomm_probe()
276 	gpiommgpio->chip.names = gpiomm_names;  in gpiomm_probe()
277 	gpiommgpio->chip.get_direction = gpiomm_gpio_get_direction;  in gpiomm_probe()
278 	gpiommgpio->chip.direction_input = gpiomm_gpio_direction_input;  in gpiomm_probe()
279 	gpiommgpio->chip.direction_output = gpiomm_gpio_direction_output;  in gpiomm_probe()
280 	gpiommgpio->chip.get = gpiomm_gpio_get;  in gpiomm_probe()
281 	gpiommgpio->chip.get_multiple = gpiomm_gpio_get_multiple;  in gpiomm_probe()
282 	gpiommgpio->chip.set = gpiomm_gpio_set;  in gpiomm_probe()
283 	gpiommgpio->chip.set_multiple = gpiomm_gpio_set_multiple;  in gpiomm_probe()
284 	gpiommgpio->base = base[id];  in gpiomm_probe()
286 	spin_lock_init(&gpiommgpio->lock);  in gpiomm_probe()
288 	err = devm_gpiochip_add_data(dev, &gpiommgpio->chip, gpiommgpio);  in gpiomm_probe()
297 	outb(0x00, base[id] + 1);  in gpiomm_probe()
310 		.name = "gpio-mm"
317 MODULE_DESCRIPTION("Diamond Systems GPIO-MM GPIO driver");