279 #define MTR_DIMMS_PRESENT(mtr)		((mtr) & (0x1 << 8))  argument
280 #define MTR_DRAM_WIDTH(mtr)		((((mtr) >> 6) & 0x1) ? 8 : 4)  argument
281 #define MTR_DRAM_BANKS(mtr)		((((mtr) >> 5) & 0x1) ? 8 : 4)  argument
282 #define MTR_DRAM_BANKS_ADDR_BITS(mtr)	((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2)  argument
283 #define MTR_DIMM_RANK(mtr)		(((mtr) >> 4) & 0x1)  argument
284 #define MTR_DIMM_RANK_ADDR_BITS(mtr)	(MTR_DIMM_RANK(mtr) ? 2 : 1)  argument
285 #define MTR_DIMM_ROWS(mtr)		(((mtr) >> 2) & 0x3)  argument
286 #define MTR_DIMM_ROWS_ADDR_BITS(mtr)	(MTR_DIMM_ROWS(mtr) + 13)  argument
287 #define MTR_DIMM_COLS(mtr)		((mtr) & 0x3)  argument
288 #define MTR_DIMM_COLS_ADDR_BITS(mtr)	(MTR_DIMM_COLS(mtr) + 10)  argument
953 	int mtr;  in determine_mtr()  local
956 		mtr = pvt->b0_mtr[slot];  in determine_mtr()
958 		mtr = pvt->b1_mtr[slot];  in determine_mtr()
960 	return mtr;  in determine_mtr()
965 static void decode_mtr(int slot_row, u16 mtr)  in decode_mtr()  argument
969 	ans = MTR_DIMMS_PRESENT(mtr);  in decode_mtr()
972 		 slot_row, mtr, ans ? "" : "NOT ");  in decode_mtr()
976 	edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));  in decode_mtr()
977 	edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));  in decode_mtr()
979 		 MTR_DIMM_RANK(mtr) ? "double" : "single");  in decode_mtr()
981 		 MTR_DIMM_ROWS(mtr) == 0 ? "8,192 - 13 rows" :  in decode_mtr()
982 		 MTR_DIMM_ROWS(mtr) == 1 ? "16,384 - 14 rows" :  in decode_mtr()
983 		 MTR_DIMM_ROWS(mtr) == 2 ? "32,768 - 15 rows" :  in decode_mtr()
986 		 MTR_DIMM_COLS(mtr) == 0 ? "1,024 - 10 columns" :  in decode_mtr()
987 		 MTR_DIMM_COLS(mtr) == 1 ? "2,048 - 11 columns" :  in decode_mtr()
988 		 MTR_DIMM_COLS(mtr) == 2 ? "4,096 - 12 columns" :  in decode_mtr()
995 	int mtr;  in handle_channel()  local
999 	mtr = determine_mtr(pvt, slot, channel);  in handle_channel()
1000 	if (MTR_DIMMS_PRESENT(mtr)) {  in handle_channel()
1005 			dinfo->dual_rank = MTR_DIMM_RANK(mtr);  in handle_channel()
1009 			addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);  in handle_channel()
1011 			addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);  in handle_channel()
1013 			addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);  in handle_channel()
1253 	int mtr;  in i5000_init_csrows()  local
1273 			mtr = determine_mtr(pvt, slot, channel);  in i5000_init_csrows()
1275 			if (!MTR_DIMMS_PRESENT(mtr))  in i5000_init_csrows()
1288 			if (MTR_DRAM_WIDTH(mtr) == 8)  in i5000_init_csrows()