65 	return sprintf(data, "0x%08x",  in fsl_mc_inject_data_hi_show()
75 	return sprintf(data, "0x%08x",  in fsl_mc_inject_data_lo_show()
85 	return sprintf(data, "0x%08x",  in fsl_mc_inject_ctrl_show()
99 		rc = kstrtoul(data, 0, &val);  in fsl_mc_inject_data_hi_store()
106 	return 0;  in fsl_mc_inject_data_hi_store()
119 		rc = kstrtoul(data, 0, &val);  in fsl_mc_inject_data_lo_store()
126 	return 0;  in fsl_mc_inject_data_lo_store()
139 		rc = kstrtoul(data, 0, &val);  in fsl_mc_inject_ctrl_store()
146 	return 0;  in fsl_mc_inject_ctrl_store()
178 	/* [0:31]    [32:63] */
179 	0xf00fe11e, 0xc33c0ff7,	/* Syndrome bit 7 */
180 	0x00ff00ff, 0x00fff0ff,
181 	0x0f0f0f0f, 0x0f0fff00,
182 	0x11113333, 0x7777000f,
183 	0x22224444, 0x8888222f,
184 	0x44448888, 0xffff4441,
185 	0x8888ffff, 0x11118882,
186 	0xffff1111, 0x22221114,	/* Syndrome bit 0 */
197 	u8 ecc = 0;  in calculate_ecc()
201 	for (i = 0; i < 8; i++) {  in calculate_ecc()
204 		bit_cnt = 0;  in calculate_ecc()
206 		for (j = 0; j < 32; j++) {  in calculate_ecc()
226 	u8 syndrome = 0;  in syndrome_from_bit()
259 	for (i = 0; i < 64; i++) {  in sbe_ecc_decode()
267 	for (i = 0; i < 8; i++) {  in sbe_ecc_decode()
268 		if ((syndrome >> i) & 0x1) {  in sbe_ecc_decode()
311 		syndrome &= 0xff;  in fsl_mc_check()
313 		syndrome &= 0xffff;  in fsl_mc_check()
320 	for (row_index = 0; row_index < mci->nr_csrows; row_index++) {  in fsl_mc_check()
364 				     row_index, 0, -1,  in fsl_mc_check()
370 				     row_index, 0, -1,  in fsl_mc_check()
407 		case 0x02000000:  in fsl_ddr_init_csrows()
410 		case 0x03000000:  in fsl_ddr_init_csrows()
413 		case 0x07000000:  in fsl_ddr_init_csrows()
416 		case 0x05000000:  in fsl_ddr_init_csrows()
425 		case 0x02000000:  in fsl_ddr_init_csrows()
428 		case 0x03000000:  in fsl_ddr_init_csrows()
431 		case 0x07000000:  in fsl_ddr_init_csrows()
434 		case 0x05000000:  in fsl_ddr_init_csrows()
443 	for (index = 0; index < mci->nr_csrows; index++) {  in fsl_ddr_init_csrows()
448 		dimm = csrow->channels[0]->dimm;  in fsl_ddr_init_csrows()
453 		start = (cs_bnds & 0xffff0000) >> 16;  in fsl_ddr_init_csrows()
454 		end   = (cs_bnds & 0x0000ffff);  in fsl_ddr_init_csrows()
488 	layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;  in fsl_mc_err_probe()
489 	layers[0].size = 4;  in fsl_mc_err_probe()
490 	layers[0].is_virt_csrow = true;  in fsl_mc_err_probe()
515 	res = of_address_to_resource(op->dev.of_node, 0, &r);  in fsl_mc_err_probe()
565 	ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DISABLE, 0);  in fsl_mc_err_probe()
568 	ddr_out32(pdata->mc_vbase + FSL_MC_ERR_DETECT, ~0);  in fsl_mc_err_probe()
582 					    FSL_MC_ERR_SBE) & 0xff0000;  in fsl_mc_err_probe()
585 		ddr_out32(pdata->mc_vbase + FSL_MC_ERR_SBE, 0x10000);  in fsl_mc_err_probe()
588 		pdata->irq = platform_get_irq(op, 0);  in fsl_mc_err_probe()
593 		if (res < 0) {  in fsl_mc_err_probe()
608 	return 0;  in fsl_mc_err_probe()
623 	edac_dbg(0, "\n");  in fsl_mc_err_remove()
626 		ddr_out32(pdata->mc_vbase + FSL_MC_ERR_INT_EN, 0);  in fsl_mc_err_remove()
635 	return 0;  in fsl_mc_err_remove()