792 	int cs_mode = 0;  in f17_get_cs_mode()  local
795 		cs_mode |= CS_EVEN_PRIMARY;  in f17_get_cs_mode()
798 		cs_mode |= CS_ODD_PRIMARY;  in f17_get_cs_mode()
802 		cs_mode |= CS_ODD_SECONDARY;  in f17_get_cs_mode()
804 	return cs_mode;  in f17_get_cs_mode()
809 	int dimm, size0, size1, cs0, cs1, cs_mode;  in debug_display_dimm_sizes_df()  local
817 		cs_mode = f17_get_cs_mode(dimm, ctrl, pvt);  in debug_display_dimm_sizes_df()
819 		size0 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs0);  in debug_display_dimm_sizes_df()
820 		size1 = pvt->ops->dbam_to_cs(pvt, ctrl, cs_mode, cs1);  in debug_display_dimm_sizes_df()
1338 				  unsigned cs_mode, int cs_mask_nr)  in k8_dbam_to_chip_select()  argument
1343 		WARN_ON(cs_mode > 11);  in k8_dbam_to_chip_select()
1344 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in k8_dbam_to_chip_select()
1348 		WARN_ON(cs_mode > 10);  in k8_dbam_to_chip_select()
1374 		diff = cs_mode/3 + (unsigned)(cs_mode > 5);  in k8_dbam_to_chip_select()
1376 		return 32 << (cs_mode - diff);  in k8_dbam_to_chip_select()
1379 		WARN_ON(cs_mode > 6);  in k8_dbam_to_chip_select()
1380 		return 32 << cs_mode;  in k8_dbam_to_chip_select()
1505 				   unsigned cs_mode, int cs_mask_nr)  in f10_dbam_to_chip_select()  argument
1509 	WARN_ON(cs_mode > 11);  in f10_dbam_to_chip_select()
1512 		return ddr3_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1514 		return ddr2_cs_size(cs_mode, dclr & WIDTH_128);  in f10_dbam_to_chip_select()
1521 				   unsigned cs_mode, int cs_mask_nr)  in f15_dbam_to_chip_select()  argument
1523 	WARN_ON(cs_mode > 12);  in f15_dbam_to_chip_select()
1525 	return ddr3_cs_size(cs_mode, false);  in f15_dbam_to_chip_select()
1530 					unsigned cs_mode, int cs_mask_nr)  in f15_m60h_dbam_to_chip_select()  argument
1535 	WARN_ON(cs_mode > 12);  in f15_m60h_dbam_to_chip_select()
1538 		if (cs_mode > 9)  in f15_m60h_dbam_to_chip_select()
1541 		cs_size = ddr4_cs_size(cs_mode);  in f15_m60h_dbam_to_chip_select()
1547 		cs_size = ddr3_lrdimm_cs_size(cs_mode, rank_multiply);  in f15_m60h_dbam_to_chip_select()
1550 		if (cs_mode == 0x1)  in f15_m60h_dbam_to_chip_select()
1553 		cs_size = ddr3_cs_size(cs_mode, false);  in f15_m60h_dbam_to_chip_select()
1563 				unsigned cs_mode, int cs_mask_nr)  in f16_dbam_to_chip_select()  argument
1565 	WARN_ON(cs_mode > 12);  in f16_dbam_to_chip_select()
1567 	if (cs_mode == 6 || cs_mode == 8 ||  in f16_dbam_to_chip_select()
1568 	    cs_mode == 9 || cs_mode == 12)  in f16_dbam_to_chip_select()
1571 		return ddr3_cs_size(cs_mode, false);  in f16_dbam_to_chip_select()
1575 				    unsigned int cs_mode, int csrow_nr)  in f17_addr_mask_to_cs_size()  argument
1582 	if (!cs_mode)  in f17_addr_mask_to_cs_size()
1586 	if (!(cs_mode & CS_EVEN) && !(csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1590 	if (!(cs_mode & CS_ODD) && (csrow_nr & 1))  in f17_addr_mask_to_cs_size()
1601 	if ((csrow_nr & 1) && (cs_mode & CS_ODD_SECONDARY))  in f17_addr_mask_to_cs_size()
2903 	u32 cs_mode, nr_pages;  in get_csrow_nr_pages()  local
2907 		cs_mode = DBAM_DIMM(csrow_nr, dbam);  in get_csrow_nr_pages()
2909 		cs_mode = f17_get_cs_mode(csrow_nr >> 1, dct, pvt);  in get_csrow_nr_pages()
2912 	nr_pages   = pvt->ops->dbam_to_cs(pvt, dct, cs_mode, csrow_nr);  in get_csrow_nr_pages()
2916 		    csrow_nr_orig, dct,  cs_mode);  in get_csrow_nr_pages()