Lines Matching full:on
14 depends on HAS_IOMEM && EDAC_SUPPORT && RAS
38 This turns on debugging information for the entire EDAC subsystem.
44 tristate "Decode MCEs in human-readable form (only on AMD for now)"
45 depends on CPU_SUP_AMD && X86_MCE_AMD
49 occurring on your machine in human-readable form.
57 depends on ACPI_APEI_GHES && (EDAC=y)
79 depends on AMD_NB && EDAC_DECODE_MCE
81 Support for error detection and correction of DRAM ECC errors on
86 depends on EDAC_AMD64
105 depends on (ARCH_ALPINE || COMPILE_TEST)
112 depends on PCI && X86_32
114 Support for error detection and correction on the AMD 76x
119 depends on PCI && X86_32
121 Support for error detection and correction on the Intel
126 depends on PCI && X86
128 Support for error detection and correction on the Intel
133 depends on PCI && X86_32
134 depends on BROKEN
136 Support for error detection and correction on the Intel
141 depends on PCI && X86_32
143 Support for error detection and correction on the Intel
148 depends on PCI && X86
150 Support for error detection and correction on the Intel
155 depends on PCI && X86
157 Support for error detection and correction on the Intel
162 depends on PCI && X86
164 Support for error detection and correction on the Intel
169 depends on PCI && X86
171 Support for error detection and correction on the Intel
176 depends on PCI && X86
178 Support for error detection and correction on the Intel
183 depends on PCI && X86
190 depends on PCI && X86 && X86_MCE_INTEL
193 i7 Core (Nehalem) Integrated Memory Controller that exists on
199 depends on PCI && X86_32
201 Support for error detection and correction on the Intel
206 depends on PCI && X86_32
208 Support for error detection and correction on the Radisys
213 depends on X86 && PCI
220 depends on X86 && PCI
227 depends on X86 && PCI
234 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG
241 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
242 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_SKX can't be y
253 depends on PCI && X86_64 && X86_MCE_INTEL && PCI_MMCONFIG && ACPI
254 depends on ACPI_NFIT || !ACPI_NFIT # if ACPI_NFIT=m, EDAC_I10NM can't be y
265 depends on PCI && X86_64 && X86_MCE_INTEL
267 Support for error detection and correction on the Intel
269 first used on the Apollo Lake platform and Denverton
270 micro-server but may appear on others in the future.
274 depends on FSL_SOC && EDAC=y
276 Support for error detection and correction on the Freescale
281 depends on ARCH_LAYERSCAPE || SOC_LS1021A
283 Support for error detection and correction on Freescale memory
284 controllers on Layerscape SoCs.
288 depends on MV64X60
290 Support for error detection and correction on the Marvell
295 depends on PPC_PASEMI && PCI
297 Support for error detection and correction on PA Semi
302 depends on PPC_CELL_COMMON
304 Support for error detection and correction on the
306 on platform without a hypervisor
310 depends on 4xx
312 This enables support for EDAC on the ECC memory used
319 depends on PCI && PPC_MAPLE
321 Support for error detection and correction on the
324 on some machine other than Maple.
328 depends on PCI && PPC_MAPLE
330 Support for error detection and correction on the
333 on some machine other than Maple.
337 depends on PPC64
339 Support for error detection and correction on the
346 depends on ARCH_HIGHBANK
348 Support for error detection and correction on the
353 depends on ARCH_HIGHBANK
355 Support for error detection and correction on the
360 depends on CPU_CAVIUM_OCTEON
362 Support for error detection and correction on the primary caches of
367 depends on CAVIUM_OCTEON_SOC
369 Support for error detection and correction on the
374 depends on CAVIUM_OCTEON_SOC
376 Support for error detection and correction on the
381 depends on PCI && CAVIUM_OCTEON_SOC
383 Support for error detection and correction on the
388 depends on ARM64
389 depends on PCI
391 Support for error detection and correction on the
398 depends on EDAC=y && (ARCH_SOCFPGA || ARCH_STRATIX10)
400 Support for error detection and correction on the
406 depends on EDAC_ALTERA=y
408 Support for error detection and correction on the
415 depends on EDAC_ALTERA=y && CACHE_L2X0
417 Support for error detection and correction on the
422 bool "Altera On-Chip RAM ECC"
423 depends on EDAC_ALTERA=y && SRAM && GENERIC_ALLOCATOR
425 Support for error detection and correction on the
426 Altera On-Chip RAM Memory for Altera SoCs.
430 depends on EDAC_ALTERA=y
432 Support for error detection and correction on the
437 depends on EDAC_ALTERA=y && MTD_NAND_DENALI
439 Support for error detection and correction on the
444 depends on EDAC_ALTERA=y && PL330_DMA=y
446 Support for error detection and correction on the
451 depends on EDAC_ALTERA=y && USB_DWC2
453 Support for error detection and correction on the
458 depends on EDAC_ALTERA=y && SPI_CADENCE_QUADSPI
460 Support for error detection and correction on the
465 depends on EDAC_ALTERA=y && MMC_DW
467 Support for error detection and correction on the
472 depends on EDAC=y && SIFIVE_L2
474 Support for error detection and correction on the SiFive SoCs.
478 depends on MACH_MVEBU_V7
480 Support for error correction and detection on the Marvell Aramada XP
485 depends on ARCH_ZYNQ || ARCH_ZYNQMP
487 Support for error detection and correction on the Synopsys DDR
492 depends on (ARM64 || COMPILE_TEST)
494 Support for error detection and correction on the
499 depends on ARCH_KEYSTONE || SOC_DRA7XX
501 Support for error detection and correction on the TI SoCs.
505 depends on ARCH_QCOM && QCOM_LLCC
507 Support for error detection and correction on the
519 depends on MACH_ASPEED_G5
521 Support for error detection and correction on the Aspeed AST 2500 SoC.
528 depends on ARM64 && ((MELLANOX_PLATFORM && ACPI) || COMPILE_TEST)
530 Support for error detection and correction on the
535 depends on ARM64
537 Support for error detection and correction on the