Lines Matching refs:XILINX_DMA_REG_DMACR
61 #define XILINX_DMA_REG_DMACR 0x0000 macro
1183 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, in xilinx_dma_alloc_chan_resources()
1188 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, in xilinx_dma_alloc_chan_resources()
1272 dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RUNSTOP); in xilinx_dma_stop_transfer()
1304 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RUNSTOP); in xilinx_dma_start()
1353 reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_start_transfer()
1366 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg); in xilinx_vdma_start_transfer()
1430 u32 ctrl_reg = dma_read(chan, XILINX_DMA_REG_DMACR); in xilinx_cdma_start_transfer()
1452 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, ctrl_reg); in xilinx_cdma_start_transfer()
1456 dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR, in xilinx_cdma_start_transfer()
1459 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, in xilinx_cdma_start_transfer()
1520 reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_dma_start_transfer()
1526 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg); in xilinx_dma_start_transfer()
1692 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, XILINX_DMA_DMACR_RESET); in xilinx_dma_reset()
1695 err = xilinx_dma_poll_timeout(chan, XILINX_DMA_REG_DMACR, tmp, in xilinx_dma_reset()
1701 dma_ctrl_read(chan, XILINX_DMA_REG_DMACR), in xilinx_dma_reset()
1730 dma_ctrl_set(chan, XILINX_DMA_REG_DMACR, in xilinx_dma_chan_reset()
2295 reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_dma_prep_dma_cyclic()
2297 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg); in xilinx_dma_prep_dma_cyclic()
2443 reg = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_dma_terminate_all()
2445 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, reg); in xilinx_dma_terminate_all()
2450 dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR, in xilinx_dma_terminate_all()
2478 dmacr = dma_ctrl_read(chan, XILINX_DMA_REG_DMACR); in xilinx_vdma_channel_set_config()
2521 dma_ctrl_write(chan, XILINX_DMA_REG_DMACR, dmacr); in xilinx_vdma_channel_set_config()
2538 dma_ctrl_clr(chan, XILINX_DMA_REG_DMACR, in xilinx_dma_chan_remove()