Lines Matching +full:sun6i +full:- +full:a31 +full:- +full:dma
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2013-2014 Allwinner Tech Co., Ltd
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
23 #include "virt-dma.h"
120 * It's named "DMA MCLK interface circuit auto gating bit" in the
122 * should be set up when initializing the DMA controller.
153 * This field is not used by the DMA controller, but will be
207 return &chan->dev->device; in chan2dev()
228 dev_dbg(sdev->slave.dev, "Common register:\n" in sun6i_dma_dump_com_regs()
234 DMA_IRQ_EN(0), readl(sdev->base + DMA_IRQ_EN(0)), in sun6i_dma_dump_com_regs()
235 DMA_IRQ_EN(1), readl(sdev->base + DMA_IRQ_EN(1)), in sun6i_dma_dump_com_regs()
236 DMA_IRQ_STAT(0), readl(sdev->base + DMA_IRQ_STAT(0)), in sun6i_dma_dump_com_regs()
237 DMA_IRQ_STAT(1), readl(sdev->base + DMA_IRQ_STAT(1)), in sun6i_dma_dump_com_regs()
238 DMA_STAT, readl(sdev->base + DMA_STAT)); in sun6i_dma_dump_com_regs()
244 phys_addr_t reg = virt_to_phys(pchan->base); in sun6i_dma_dump_chan_regs()
246 dev_dbg(sdev->slave.dev, "Chan %d reg: %pa\n" in sun6i_dma_dump_chan_regs()
255 pchan->idx, ®, in sun6i_dma_dump_chan_regs()
257 readl(pchan->base + DMA_CHAN_ENABLE), in sun6i_dma_dump_chan_regs()
259 readl(pchan->base + DMA_CHAN_PAUSE), in sun6i_dma_dump_chan_regs()
261 readl(pchan->base + DMA_CHAN_LLI_ADDR), in sun6i_dma_dump_chan_regs()
263 readl(pchan->base + DMA_CHAN_CUR_CFG), in sun6i_dma_dump_chan_regs()
265 readl(pchan->base + DMA_CHAN_CUR_SRC), in sun6i_dma_dump_chan_regs()
267 readl(pchan->base + DMA_CHAN_CUR_DST), in sun6i_dma_dump_chan_regs()
269 readl(pchan->base + DMA_CHAN_CUR_CNT), in sun6i_dma_dump_chan_regs()
271 readl(pchan->base + DMA_CHAN_CUR_PARA)); in sun6i_dma_dump_chan_regs()
286 return -EINVAL; in convert_burst()
297 writel(SUN8I_DMA_GATE_ENABLE, sdev->base + SUN8I_DMA_GATE); in sun6i_enable_clock_autogate_a23()
302 writel(SUNXI_H3_DMA_GATE_ENABLE, sdev->base + SUNXI_H3_DMA_GATE); in sun6i_enable_clock_autogate_h3()
343 struct sun6i_desc *txd = pchan->desc; in sun6i_get_chan_size()
348 pos = readl(pchan->base + DMA_CHAN_LLI_ADDR); in sun6i_get_chan_size()
349 bytes = readl(pchan->base + DMA_CHAN_CUR_CNT); in sun6i_get_chan_size()
354 for (lli = txd->v_lli; lli; lli = lli->v_lli_next) { in sun6i_get_chan_size()
355 if (lli->p_lli_next == pos) { in sun6i_get_chan_size()
356 for (lli = lli->v_lli_next; lli; lli = lli->v_lli_next) in sun6i_get_chan_size()
357 bytes += lli->len; in sun6i_get_chan_size()
374 txd->p_lli = next_phy; in sun6i_dma_lli_add()
375 txd->v_lli = next; in sun6i_dma_lli_add()
377 prev->p_lli_next = next_phy; in sun6i_dma_lli_add()
378 prev->v_lli_next = next; in sun6i_dma_lli_add()
381 next->p_lli_next = LLI_LAST_ITEM; in sun6i_dma_lli_add()
382 next->v_lli_next = NULL; in sun6i_dma_lli_add()
392 dev_dbg(chan2dev(&vchan->vc.chan), in sun6i_dma_dump_lli()
393 "\n\tdesc: p - %pa v - 0x%p\n" in sun6i_dma_dump_lli()
394 "\t\tc - 0x%08x s - 0x%08x d - 0x%08x\n" in sun6i_dma_dump_lli()
395 "\t\tl - 0x%08x p - 0x%08x n - 0x%08x\n", in sun6i_dma_dump_lli()
397 lli->cfg, lli->src, lli->dst, in sun6i_dma_dump_lli()
398 lli->len, lli->para, lli->p_lli_next); in sun6i_dma_dump_lli()
403 struct sun6i_desc *txd = to_sun6i_desc(&vd->tx); in sun6i_dma_free_desc()
404 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(vd->tx.chan->device); in sun6i_dma_free_desc()
411 p_lli = txd->p_lli; in sun6i_dma_free_desc()
412 v_lli = txd->v_lli; in sun6i_dma_free_desc()
415 v_next = v_lli->v_lli_next; in sun6i_dma_free_desc()
416 p_next = v_lli->p_lli_next; in sun6i_dma_free_desc()
418 dma_pool_free(sdev->pool, v_lli, p_lli); in sun6i_dma_free_desc()
429 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(vchan->vc.chan.device); in sun6i_dma_start_desc()
430 struct virt_dma_desc *desc = vchan_next_desc(&vchan->vc); in sun6i_dma_start_desc()
431 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_start_desc()
435 return -EAGAIN; in sun6i_dma_start_desc()
438 pchan->desc = NULL; in sun6i_dma_start_desc()
439 pchan->done = NULL; in sun6i_dma_start_desc()
440 return -EAGAIN; in sun6i_dma_start_desc()
443 list_del(&desc->node); in sun6i_dma_start_desc()
445 pchan->desc = to_sun6i_desc(&desc->tx); in sun6i_dma_start_desc()
446 pchan->done = NULL; in sun6i_dma_start_desc()
448 sun6i_dma_dump_lli(vchan, pchan->desc->v_lli); in sun6i_dma_start_desc()
450 irq_reg = pchan->idx / DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
451 irq_offset = pchan->idx % DMA_IRQ_CHAN_NR; in sun6i_dma_start_desc()
453 vchan->irq_type = vchan->cyclic ? DMA_IRQ_PKG : DMA_IRQ_QUEUE; in sun6i_dma_start_desc()
455 irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg)); in sun6i_dma_start_desc()
458 irq_val |= vchan->irq_type << (irq_offset * DMA_IRQ_CHAN_WIDTH); in sun6i_dma_start_desc()
459 writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg)); in sun6i_dma_start_desc()
461 writel(pchan->desc->p_lli, pchan->base + DMA_CHAN_LLI_ADDR); in sun6i_dma_start_desc()
462 writel(DMA_CHAN_ENABLE_START, pchan->base + DMA_CHAN_ENABLE); in sun6i_dma_start_desc()
478 list_for_each_entry(vchan, &sdev->slave.channels, vc.chan.device_node) { in sun6i_dma_tasklet()
479 spin_lock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
481 pchan = vchan->phy; in sun6i_dma_tasklet()
483 if (pchan && pchan->done) { in sun6i_dma_tasklet()
488 dev_dbg(sdev->slave.dev, "pchan %u: free\n", in sun6i_dma_tasklet()
489 pchan->idx); in sun6i_dma_tasklet()
492 vchan->phy = NULL; in sun6i_dma_tasklet()
493 pchan->vchan = NULL; in sun6i_dma_tasklet()
496 spin_unlock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
499 spin_lock_irq(&sdev->lock); in sun6i_dma_tasklet()
500 for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { in sun6i_dma_tasklet()
501 pchan = &sdev->pchans[pchan_idx]; in sun6i_dma_tasklet()
503 if (pchan->vchan || list_empty(&sdev->pending)) in sun6i_dma_tasklet()
506 vchan = list_first_entry(&sdev->pending, in sun6i_dma_tasklet()
510 list_del_init(&vchan->node); in sun6i_dma_tasklet()
514 pchan->vchan = vchan; in sun6i_dma_tasklet()
515 vchan->phy = pchan; in sun6i_dma_tasklet()
516 dev_dbg(sdev->slave.dev, "pchan %u: alloc vchan %p\n", in sun6i_dma_tasklet()
517 pchan->idx, &vchan->vc); in sun6i_dma_tasklet()
519 spin_unlock_irq(&sdev->lock); in sun6i_dma_tasklet()
521 for (pchan_idx = 0; pchan_idx < sdev->num_pchans; pchan_idx++) { in sun6i_dma_tasklet()
525 pchan = sdev->pchans + pchan_idx; in sun6i_dma_tasklet()
526 vchan = pchan->vchan; in sun6i_dma_tasklet()
528 spin_lock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
530 spin_unlock_irq(&vchan->vc.lock); in sun6i_dma_tasklet()
543 for (i = 0; i < sdev->num_pchans / DMA_IRQ_CHAN_NR; i++) { in sun6i_dma_interrupt()
544 status = readl(sdev->base + DMA_IRQ_STAT(i)); in sun6i_dma_interrupt()
548 dev_dbg(sdev->slave.dev, "DMA irq status %s: 0x%x\n", in sun6i_dma_interrupt()
551 writel(status, sdev->base + DMA_IRQ_STAT(i)); in sun6i_dma_interrupt()
554 pchan = sdev->pchans + j; in sun6i_dma_interrupt()
555 vchan = pchan->vchan; in sun6i_dma_interrupt()
556 if (vchan && (status & vchan->irq_type)) { in sun6i_dma_interrupt()
557 if (vchan->cyclic) { in sun6i_dma_interrupt()
558 vchan_cyclic_callback(&pchan->desc->vd); in sun6i_dma_interrupt()
560 spin_lock(&vchan->vc.lock); in sun6i_dma_interrupt()
561 vchan_cookie_complete(&pchan->desc->vd); in sun6i_dma_interrupt()
562 pchan->done = pchan->desc; in sun6i_dma_interrupt()
563 spin_unlock(&vchan->vc.lock); in sun6i_dma_interrupt()
570 if (!atomic_read(&sdev->tasklet_shutdown)) in sun6i_dma_interrupt()
571 tasklet_schedule(&sdev->task); in sun6i_dma_interrupt()
587 src_addr_width = sconfig->src_addr_width; in set_config()
588 dst_addr_width = sconfig->dst_addr_width; in set_config()
589 src_maxburst = sconfig->src_maxburst; in set_config()
590 dst_maxburst = sconfig->dst_maxburst; in set_config()
604 return -EINVAL; in set_config()
607 if (!(BIT(src_addr_width) & sdev->slave.src_addr_widths)) in set_config()
608 return -EINVAL; in set_config()
609 if (!(BIT(dst_addr_width) & sdev->slave.dst_addr_widths)) in set_config()
610 return -EINVAL; in set_config()
611 if (!(BIT(src_maxburst) & sdev->cfg->src_burst_lengths)) in set_config()
612 return -EINVAL; in set_config()
613 if (!(BIT(dst_maxburst) & sdev->cfg->dst_burst_lengths)) in set_config()
614 return -EINVAL; in set_config()
624 sdev->cfg->set_burst_length(p_cfg, src_burst, dst_burst); in set_config()
633 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_dma_memcpy()
642 __func__, vchan->vc.chan.chan_id, &dest, &src, len, flags); in sun6i_dma_prep_dma_memcpy()
651 v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); in sun6i_dma_prep_dma_memcpy()
653 dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); in sun6i_dma_prep_dma_memcpy()
657 v_lli->src = src; in sun6i_dma_prep_dma_memcpy()
658 v_lli->dst = dest; in sun6i_dma_prep_dma_memcpy()
659 v_lli->len = len; in sun6i_dma_prep_dma_memcpy()
660 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_dma_memcpy()
664 v_lli->cfg = DMA_CHAN_CFG_SRC_WIDTH(width) | in sun6i_dma_prep_dma_memcpy()
667 sdev->cfg->set_burst_length(&v_lli->cfg, burst, burst); in sun6i_dma_prep_dma_memcpy()
668 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, DRQ_SDRAM); in sun6i_dma_prep_dma_memcpy()
669 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, LINEAR_MODE); in sun6i_dma_prep_dma_memcpy()
675 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_dma_memcpy()
687 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_slave_sg()
689 struct dma_slave_config *sconfig = &vchan->cfg; in sun6i_dma_prep_slave_sg()
702 dev_err(chan2dev(chan), "Invalid DMA configuration\n"); in sun6i_dma_prep_slave_sg()
711 v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); in sun6i_dma_prep_slave_sg()
715 v_lli->len = sg_dma_len(sg); in sun6i_dma_prep_slave_sg()
716 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_slave_sg()
719 v_lli->src = sg_dma_address(sg); in sun6i_dma_prep_slave_sg()
720 v_lli->dst = sconfig->dst_addr; in sun6i_dma_prep_slave_sg()
721 v_lli->cfg = lli_cfg; in sun6i_dma_prep_slave_sg()
722 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); in sun6i_dma_prep_slave_sg()
723 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); in sun6i_dma_prep_slave_sg()
727 __func__, vchan->vc.chan.chan_id, in sun6i_dma_prep_slave_sg()
728 &sconfig->dst_addr, &sg_dma_address(sg), in sun6i_dma_prep_slave_sg()
732 v_lli->src = sconfig->src_addr; in sun6i_dma_prep_slave_sg()
733 v_lli->dst = sg_dma_address(sg); in sun6i_dma_prep_slave_sg()
734 v_lli->cfg = lli_cfg; in sun6i_dma_prep_slave_sg()
735 sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); in sun6i_dma_prep_slave_sg()
736 sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); in sun6i_dma_prep_slave_sg()
740 __func__, vchan->vc.chan.chan_id, in sun6i_dma_prep_slave_sg()
741 &sg_dma_address(sg), &sconfig->src_addr, in sun6i_dma_prep_slave_sg()
748 dev_dbg(chan2dev(chan), "First: %pad\n", &txd->p_lli); in sun6i_dma_prep_slave_sg()
749 for (prev = txd->v_lli; prev; prev = prev->v_lli_next) in sun6i_dma_prep_slave_sg()
752 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_slave_sg()
755 for (prev = txd->v_lli; prev; prev = prev->v_lli_next) in sun6i_dma_prep_slave_sg()
756 dma_pool_free(sdev->pool, prev, virt_to_phys(prev)); in sun6i_dma_prep_slave_sg()
769 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_prep_dma_cyclic()
771 struct dma_slave_config *sconfig = &vchan->cfg; in sun6i_dma_prep_dma_cyclic()
781 dev_err(chan2dev(chan), "Invalid DMA configuration\n"); in sun6i_dma_prep_dma_cyclic()
790 v_lli = dma_pool_alloc(sdev->pool, GFP_NOWAIT, &p_lli); in sun6i_dma_prep_dma_cyclic()
792 dev_err(sdev->slave.dev, "Failed to alloc lli memory\n"); in sun6i_dma_prep_dma_cyclic()
796 v_lli->len = period_len; in sun6i_dma_prep_dma_cyclic()
797 v_lli->para = NORMAL_WAIT; in sun6i_dma_prep_dma_cyclic()
800 v_lli->src = buf_addr + period_len * i; in sun6i_dma_prep_dma_cyclic()
801 v_lli->dst = sconfig->dst_addr; in sun6i_dma_prep_dma_cyclic()
802 v_lli->cfg = lli_cfg; in sun6i_dma_prep_dma_cyclic()
803 sdev->cfg->set_drq(&v_lli->cfg, DRQ_SDRAM, vchan->port); in sun6i_dma_prep_dma_cyclic()
804 sdev->cfg->set_mode(&v_lli->cfg, LINEAR_MODE, IO_MODE); in sun6i_dma_prep_dma_cyclic()
806 v_lli->src = sconfig->src_addr; in sun6i_dma_prep_dma_cyclic()
807 v_lli->dst = buf_addr + period_len * i; in sun6i_dma_prep_dma_cyclic()
808 v_lli->cfg = lli_cfg; in sun6i_dma_prep_dma_cyclic()
809 sdev->cfg->set_drq(&v_lli->cfg, vchan->port, DRQ_SDRAM); in sun6i_dma_prep_dma_cyclic()
810 sdev->cfg->set_mode(&v_lli->cfg, IO_MODE, LINEAR_MODE); in sun6i_dma_prep_dma_cyclic()
816 prev->p_lli_next = txd->p_lli; /* cyclic list */ in sun6i_dma_prep_dma_cyclic()
818 vchan->cyclic = true; in sun6i_dma_prep_dma_cyclic()
820 return vchan_tx_prep(&vchan->vc, &txd->vd, flags); in sun6i_dma_prep_dma_cyclic()
823 for (prev = txd->v_lli; prev; prev = prev->v_lli_next) in sun6i_dma_prep_dma_cyclic()
824 dma_pool_free(sdev->pool, prev, virt_to_phys(prev)); in sun6i_dma_prep_dma_cyclic()
834 memcpy(&vchan->cfg, config, sizeof(*config)); in sun6i_dma_config()
841 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_pause()
843 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_pause()
845 dev_dbg(chan2dev(chan), "vchan %p: pause\n", &vchan->vc); in sun6i_dma_pause()
849 pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_pause()
851 spin_lock(&sdev->lock); in sun6i_dma_pause()
852 list_del_init(&vchan->node); in sun6i_dma_pause()
853 spin_unlock(&sdev->lock); in sun6i_dma_pause()
861 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_resume()
863 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_resume()
866 dev_dbg(chan2dev(chan), "vchan %p: resume\n", &vchan->vc); in sun6i_dma_resume()
868 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_resume()
872 pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_resume()
873 } else if (!list_empty(&vchan->vc.desc_issued)) { in sun6i_dma_resume()
874 spin_lock(&sdev->lock); in sun6i_dma_resume()
875 list_add_tail(&vchan->node, &sdev->pending); in sun6i_dma_resume()
876 spin_unlock(&sdev->lock); in sun6i_dma_resume()
879 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_resume()
886 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_terminate_all()
888 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_terminate_all()
892 spin_lock(&sdev->lock); in sun6i_dma_terminate_all()
893 list_del_init(&vchan->node); in sun6i_dma_terminate_all()
894 spin_unlock(&sdev->lock); in sun6i_dma_terminate_all()
896 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_terminate_all()
898 if (vchan->cyclic) { in sun6i_dma_terminate_all()
899 vchan->cyclic = false; in sun6i_dma_terminate_all()
900 if (pchan && pchan->desc) { in sun6i_dma_terminate_all()
901 struct virt_dma_desc *vd = &pchan->desc->vd; in sun6i_dma_terminate_all()
902 struct virt_dma_chan *vc = &vchan->vc; in sun6i_dma_terminate_all()
904 list_add_tail(&vd->node, &vc->desc_completed); in sun6i_dma_terminate_all()
908 vchan_get_all_descriptors(&vchan->vc, &head); in sun6i_dma_terminate_all()
911 writel(DMA_CHAN_ENABLE_STOP, pchan->base + DMA_CHAN_ENABLE); in sun6i_dma_terminate_all()
912 writel(DMA_CHAN_PAUSE_RESUME, pchan->base + DMA_CHAN_PAUSE); in sun6i_dma_terminate_all()
914 vchan->phy = NULL; in sun6i_dma_terminate_all()
915 pchan->vchan = NULL; in sun6i_dma_terminate_all()
916 pchan->desc = NULL; in sun6i_dma_terminate_all()
917 pchan->done = NULL; in sun6i_dma_terminate_all()
920 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_terminate_all()
922 vchan_dma_desc_free_list(&vchan->vc, &head); in sun6i_dma_terminate_all()
932 struct sun6i_pchan *pchan = vchan->phy; in sun6i_dma_tx_status()
944 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_tx_status()
946 vd = vchan_find_desc(&vchan->vc, cookie); in sun6i_dma_tx_status()
947 txd = to_sun6i_desc(&vd->tx); in sun6i_dma_tx_status()
950 for (lli = txd->v_lli; lli != NULL; lli = lli->v_lli_next) in sun6i_dma_tx_status()
951 bytes += lli->len; in sun6i_dma_tx_status()
952 } else if (!pchan || !pchan->desc) { in sun6i_dma_tx_status()
958 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_tx_status()
967 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_issue_pending()
971 spin_lock_irqsave(&vchan->vc.lock, flags); in sun6i_dma_issue_pending()
973 if (vchan_issue_pending(&vchan->vc)) { in sun6i_dma_issue_pending()
974 spin_lock(&sdev->lock); in sun6i_dma_issue_pending()
976 if (!vchan->phy && list_empty(&vchan->node)) { in sun6i_dma_issue_pending()
977 list_add_tail(&vchan->node, &sdev->pending); in sun6i_dma_issue_pending()
978 tasklet_schedule(&sdev->task); in sun6i_dma_issue_pending()
980 &vchan->vc); in sun6i_dma_issue_pending()
983 spin_unlock(&sdev->lock); in sun6i_dma_issue_pending()
986 &vchan->vc); in sun6i_dma_issue_pending()
989 spin_unlock_irqrestore(&vchan->vc.lock, flags); in sun6i_dma_issue_pending()
994 struct sun6i_dma_dev *sdev = to_sun6i_dma_dev(chan->device); in sun6i_dma_free_chan_resources()
998 spin_lock_irqsave(&sdev->lock, flags); in sun6i_dma_free_chan_resources()
999 list_del_init(&vchan->node); in sun6i_dma_free_chan_resources()
1000 spin_unlock_irqrestore(&sdev->lock, flags); in sun6i_dma_free_chan_resources()
1002 vchan_free_chan_resources(&vchan->vc); in sun6i_dma_free_chan_resources()
1008 struct sun6i_dma_dev *sdev = ofdma->of_dma_data; in sun6i_dma_of_xlate()
1011 u8 port = dma_spec->args[0]; in sun6i_dma_of_xlate()
1013 if (port > sdev->max_request) in sun6i_dma_of_xlate()
1016 chan = dma_get_any_slave_channel(&sdev->slave); in sun6i_dma_of_xlate()
1021 vchan->port = port; in sun6i_dma_of_xlate()
1028 /* Disable all interrupts from DMA */ in sun6i_kill_tasklet()
1029 writel(0, sdev->base + DMA_IRQ_EN(0)); in sun6i_kill_tasklet()
1030 writel(0, sdev->base + DMA_IRQ_EN(1)); in sun6i_kill_tasklet()
1033 atomic_inc(&sdev->tasklet_shutdown); in sun6i_kill_tasklet()
1036 devm_free_irq(sdev->slave.dev, sdev->irq, sdev); in sun6i_kill_tasklet()
1039 tasklet_kill(&sdev->task); in sun6i_kill_tasklet()
1046 for (i = 0; i < sdev->num_vchans; i++) { in sun6i_dma_free()
1047 struct sun6i_vchan *vchan = &sdev->vchans[i]; in sun6i_dma_free()
1049 list_del(&vchan->vc.chan.device_node); in sun6i_dma_free()
1050 tasklet_kill(&vchan->vc.task); in sun6i_dma_free()
1055 * For A31:
1156 * The A64 binding uses the number of dma channels from the
1177 * The H6 binding uses the number of dma channels from the
1222 { .compatible = "allwinner,sun6i-a31-dma", .data = &sun6i_a31_dma_cfg },
1223 { .compatible = "allwinner,sun8i-a23-dma", .data = &sun8i_a23_dma_cfg },
1224 { .compatible = "allwinner,sun8i-a83t-dma", .data = &sun8i_a83t_dma_cfg },
1225 { .compatible = "allwinner,sun8i-h3-dma", .data = &sun8i_h3_dma_cfg },
1226 { .compatible = "allwinner,sun8i-v3s-dma", .data = &sun8i_v3s_dma_cfg },
1227 { .compatible = "allwinner,sun50i-a64-dma", .data = &sun50i_a64_dma_cfg },
1228 { .compatible = "allwinner,sun50i-h6-dma", .data = &sun50i_h6_dma_cfg },
1235 struct device_node *np = pdev->dev.of_node; in sun6i_dma_probe()
1240 sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL); in sun6i_dma_probe()
1242 return -ENOMEM; in sun6i_dma_probe()
1244 sdc->cfg = of_device_get_match_data(&pdev->dev); in sun6i_dma_probe()
1245 if (!sdc->cfg) in sun6i_dma_probe()
1246 return -ENODEV; in sun6i_dma_probe()
1249 sdc->base = devm_ioremap_resource(&pdev->dev, res); in sun6i_dma_probe()
1250 if (IS_ERR(sdc->base)) in sun6i_dma_probe()
1251 return PTR_ERR(sdc->base); in sun6i_dma_probe()
1253 sdc->irq = platform_get_irq(pdev, 0); in sun6i_dma_probe()
1254 if (sdc->irq < 0) in sun6i_dma_probe()
1255 return sdc->irq; in sun6i_dma_probe()
1257 sdc->clk = devm_clk_get(&pdev->dev, NULL); in sun6i_dma_probe()
1258 if (IS_ERR(sdc->clk)) { in sun6i_dma_probe()
1259 dev_err(&pdev->dev, "No clock specified\n"); in sun6i_dma_probe()
1260 return PTR_ERR(sdc->clk); in sun6i_dma_probe()
1263 if (sdc->cfg->has_mbus_clk) { in sun6i_dma_probe()
1264 sdc->clk_mbus = devm_clk_get(&pdev->dev, "mbus"); in sun6i_dma_probe()
1265 if (IS_ERR(sdc->clk_mbus)) { in sun6i_dma_probe()
1266 dev_err(&pdev->dev, "No mbus clock specified\n"); in sun6i_dma_probe()
1267 return PTR_ERR(sdc->clk_mbus); in sun6i_dma_probe()
1271 sdc->rstc = devm_reset_control_get(&pdev->dev, NULL); in sun6i_dma_probe()
1272 if (IS_ERR(sdc->rstc)) { in sun6i_dma_probe()
1273 dev_err(&pdev->dev, "No reset controller specified\n"); in sun6i_dma_probe()
1274 return PTR_ERR(sdc->rstc); in sun6i_dma_probe()
1277 sdc->pool = dmam_pool_create(dev_name(&pdev->dev), &pdev->dev, in sun6i_dma_probe()
1279 if (!sdc->pool) { in sun6i_dma_probe()
1280 dev_err(&pdev->dev, "No memory for descriptors dma pool\n"); in sun6i_dma_probe()
1281 return -ENOMEM; in sun6i_dma_probe()
1285 INIT_LIST_HEAD(&sdc->pending); in sun6i_dma_probe()
1286 spin_lock_init(&sdc->lock); in sun6i_dma_probe()
1288 dma_cap_set(DMA_PRIVATE, sdc->slave.cap_mask); in sun6i_dma_probe()
1289 dma_cap_set(DMA_MEMCPY, sdc->slave.cap_mask); in sun6i_dma_probe()
1290 dma_cap_set(DMA_SLAVE, sdc->slave.cap_mask); in sun6i_dma_probe()
1291 dma_cap_set(DMA_CYCLIC, sdc->slave.cap_mask); in sun6i_dma_probe()
1293 INIT_LIST_HEAD(&sdc->slave.channels); in sun6i_dma_probe()
1294 sdc->slave.device_free_chan_resources = sun6i_dma_free_chan_resources; in sun6i_dma_probe()
1295 sdc->slave.device_tx_status = sun6i_dma_tx_status; in sun6i_dma_probe()
1296 sdc->slave.device_issue_pending = sun6i_dma_issue_pending; in sun6i_dma_probe()
1297 sdc->slave.device_prep_slave_sg = sun6i_dma_prep_slave_sg; in sun6i_dma_probe()
1298 sdc->slave.device_prep_dma_memcpy = sun6i_dma_prep_dma_memcpy; in sun6i_dma_probe()
1299 sdc->slave.device_prep_dma_cyclic = sun6i_dma_prep_dma_cyclic; in sun6i_dma_probe()
1300 sdc->slave.copy_align = DMAENGINE_ALIGN_4_BYTES; in sun6i_dma_probe()
1301 sdc->slave.device_config = sun6i_dma_config; in sun6i_dma_probe()
1302 sdc->slave.device_pause = sun6i_dma_pause; in sun6i_dma_probe()
1303 sdc->slave.device_resume = sun6i_dma_resume; in sun6i_dma_probe()
1304 sdc->slave.device_terminate_all = sun6i_dma_terminate_all; in sun6i_dma_probe()
1305 sdc->slave.src_addr_widths = sdc->cfg->src_addr_widths; in sun6i_dma_probe()
1306 sdc->slave.dst_addr_widths = sdc->cfg->dst_addr_widths; in sun6i_dma_probe()
1307 sdc->slave.directions = BIT(DMA_DEV_TO_MEM) | in sun6i_dma_probe()
1309 sdc->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in sun6i_dma_probe()
1310 sdc->slave.dev = &pdev->dev; in sun6i_dma_probe()
1312 sdc->num_pchans = sdc->cfg->nr_max_channels; in sun6i_dma_probe()
1313 sdc->num_vchans = sdc->cfg->nr_max_vchans; in sun6i_dma_probe()
1314 sdc->max_request = sdc->cfg->nr_max_requests; in sun6i_dma_probe()
1316 ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans); in sun6i_dma_probe()
1317 if (ret && !sdc->num_pchans) { in sun6i_dma_probe()
1318 dev_err(&pdev->dev, "Can't get dma-channels.\n"); in sun6i_dma_probe()
1322 ret = of_property_read_u32(np, "dma-requests", &sdc->max_request); in sun6i_dma_probe()
1323 if (ret && !sdc->max_request) { in sun6i_dma_probe()
1324 dev_info(&pdev->dev, "Missing dma-requests, using %u.\n", in sun6i_dma_probe()
1326 sdc->max_request = DMA_CHAN_MAX_DRQ_A31; in sun6i_dma_probe()
1333 if (!sdc->num_vchans) in sun6i_dma_probe()
1334 sdc->num_vchans = 2 * (sdc->max_request + 1); in sun6i_dma_probe()
1336 sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans, in sun6i_dma_probe()
1338 if (!sdc->pchans) in sun6i_dma_probe()
1339 return -ENOMEM; in sun6i_dma_probe()
1341 sdc->vchans = devm_kcalloc(&pdev->dev, sdc->num_vchans, in sun6i_dma_probe()
1343 if (!sdc->vchans) in sun6i_dma_probe()
1344 return -ENOMEM; in sun6i_dma_probe()
1346 tasklet_setup(&sdc->task, sun6i_dma_tasklet); in sun6i_dma_probe()
1348 for (i = 0; i < sdc->num_pchans; i++) { in sun6i_dma_probe()
1349 struct sun6i_pchan *pchan = &sdc->pchans[i]; in sun6i_dma_probe()
1351 pchan->idx = i; in sun6i_dma_probe()
1352 pchan->base = sdc->base + 0x100 + i * 0x40; in sun6i_dma_probe()
1355 for (i = 0; i < sdc->num_vchans; i++) { in sun6i_dma_probe()
1356 struct sun6i_vchan *vchan = &sdc->vchans[i]; in sun6i_dma_probe()
1358 INIT_LIST_HEAD(&vchan->node); in sun6i_dma_probe()
1359 vchan->vc.desc_free = sun6i_dma_free_desc; in sun6i_dma_probe()
1360 vchan_init(&vchan->vc, &sdc->slave); in sun6i_dma_probe()
1363 ret = reset_control_deassert(sdc->rstc); in sun6i_dma_probe()
1365 dev_err(&pdev->dev, "Couldn't deassert the device from reset\n"); in sun6i_dma_probe()
1369 ret = clk_prepare_enable(sdc->clk); in sun6i_dma_probe()
1371 dev_err(&pdev->dev, "Couldn't enable the clock\n"); in sun6i_dma_probe()
1375 if (sdc->cfg->has_mbus_clk) { in sun6i_dma_probe()
1376 ret = clk_prepare_enable(sdc->clk_mbus); in sun6i_dma_probe()
1378 dev_err(&pdev->dev, "Couldn't enable mbus clock\n"); in sun6i_dma_probe()
1383 ret = devm_request_irq(&pdev->dev, sdc->irq, sun6i_dma_interrupt, 0, in sun6i_dma_probe()
1384 dev_name(&pdev->dev), sdc); in sun6i_dma_probe()
1386 dev_err(&pdev->dev, "Cannot request IRQ\n"); in sun6i_dma_probe()
1390 ret = dma_async_device_register(&sdc->slave); in sun6i_dma_probe()
1392 dev_warn(&pdev->dev, "Failed to register DMA engine device\n"); in sun6i_dma_probe()
1396 ret = of_dma_controller_register(pdev->dev.of_node, sun6i_dma_of_xlate, in sun6i_dma_probe()
1399 dev_err(&pdev->dev, "of_dma_controller_register failed\n"); in sun6i_dma_probe()
1403 if (sdc->cfg->clock_autogate_enable) in sun6i_dma_probe()
1404 sdc->cfg->clock_autogate_enable(sdc); in sun6i_dma_probe()
1409 dma_async_device_unregister(&sdc->slave); in sun6i_dma_probe()
1413 clk_disable_unprepare(sdc->clk_mbus); in sun6i_dma_probe()
1415 clk_disable_unprepare(sdc->clk); in sun6i_dma_probe()
1417 reset_control_assert(sdc->rstc); in sun6i_dma_probe()
1427 of_dma_controller_free(pdev->dev.of_node); in sun6i_dma_remove()
1428 dma_async_device_unregister(&sdc->slave); in sun6i_dma_remove()
1432 clk_disable_unprepare(sdc->clk_mbus); in sun6i_dma_remove()
1433 clk_disable_unprepare(sdc->clk); in sun6i_dma_remove()
1434 reset_control_assert(sdc->rstc); in sun6i_dma_remove()
1445 .name = "sun6i-dma",
1451 MODULE_DESCRIPTION("Allwinner A31 DMA Controller Driver");
1453 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");