Lines Matching refs:dmadev
310 static u32 stm32_mdma_read(struct stm32_mdma_device *dmadev, u32 reg) in stm32_mdma_read() argument
312 return readl_relaxed(dmadev->base + reg); in stm32_mdma_read()
315 static void stm32_mdma_write(struct stm32_mdma_device *dmadev, u32 reg, u32 val) in stm32_mdma_write() argument
317 writel_relaxed(val, dmadev->base + reg); in stm32_mdma_write()
320 static void stm32_mdma_set_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_set_bits() argument
323 void __iomem *addr = dmadev->base + reg; in stm32_mdma_set_bits()
328 static void stm32_mdma_clr_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_clr_bits() argument
331 void __iomem *addr = dmadev->base + reg; in stm32_mdma_clr_bits()
428 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_disable_chan() local
436 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_IRQ_MASK); in stm32_mdma_disable_chan()
438 ccr = stm32_mdma_read(dmadev, reg); in stm32_mdma_disable_chan()
440 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_disable_chan()
444 dmadev->base + STM32_MDMA_CISR(id), cisr, in stm32_mdma_disable_chan()
457 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_stop() local
467 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_stop()
471 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_stop()
477 static void stm32_mdma_set_bus(struct stm32_mdma_device *dmadev, u32 *ctbr, in stm32_mdma_set_bus() argument
486 for (i = 0; i < dmadev->nr_ahb_addr_masks; i++) { in stm32_mdma_set_bus()
487 if (mask == dmadev->ahb_addr_masks[i]) { in stm32_mdma_set_bus()
500 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_set_xfer_param() local
513 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_set_xfer_param()
514 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_set_xfer_param()
515 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_set_xfer_param()
604 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_set_xfer_param()
611 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(chan->id), dst_addr); in stm32_mdma_set_xfer_param()
651 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_set_xfer_param()
658 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(chan->id), src_addr); in stm32_mdma_set_xfer_param()
730 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_setup_xfer() local
749 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_setup_xfer()
757 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_setup_xfer()
826 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_cyclic() local
865 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_prep_dma_cyclic()
871 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_prep_dma_cyclic()
915 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_memcpy() local
941 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
942 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
943 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_prep_dma_memcpy()
944 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_prep_dma_memcpy()
967 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, src); in stm32_mdma_prep_dma_memcpy()
968 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, dest); in stm32_mdma_prep_dma_memcpy()
1091 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_dump_reg() local
1094 stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id))); in stm32_mdma_dump_reg()
1096 stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id))); in stm32_mdma_dump_reg()
1098 stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id))); in stm32_mdma_dump_reg()
1100 stm32_mdma_read(dmadev, STM32_MDMA_CSAR(chan->id))); in stm32_mdma_dump_reg()
1102 stm32_mdma_read(dmadev, STM32_MDMA_CDAR(chan->id))); in stm32_mdma_dump_reg()
1104 stm32_mdma_read(dmadev, STM32_MDMA_CBRUR(chan->id))); in stm32_mdma_dump_reg()
1106 stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id))); in stm32_mdma_dump_reg()
1108 stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id))); in stm32_mdma_dump_reg()
1110 stm32_mdma_read(dmadev, STM32_MDMA_CMAR(chan->id))); in stm32_mdma_dump_reg()
1112 stm32_mdma_read(dmadev, STM32_MDMA_CMDR(chan->id))); in stm32_mdma_dump_reg()
1117 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_start_transfer() local
1135 stm32_mdma_write(dmadev, STM32_MDMA_CCR(id), chan->desc->ccr); in stm32_mdma_start_transfer()
1136 stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr); in stm32_mdma_start_transfer()
1137 stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr); in stm32_mdma_start_transfer()
1138 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar); in stm32_mdma_start_transfer()
1139 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar); in stm32_mdma_start_transfer()
1140 stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur); in stm32_mdma_start_transfer()
1141 stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar); in stm32_mdma_start_transfer()
1142 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr); in stm32_mdma_start_transfer()
1143 stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar); in stm32_mdma_start_transfer()
1144 stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr); in stm32_mdma_start_transfer()
1147 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_start_transfer()
1149 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(id), status); in stm32_mdma_start_transfer()
1154 stm32_mdma_set_bits(dmadev, STM32_MDMA_CCR(id), STM32_MDMA_CCR_EN); in stm32_mdma_start_transfer()
1159 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_start_transfer()
1205 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_resume() local
1215 stm32_mdma_write(dmadev, STM32_MDMA_CCR(chan->id), chan->desc->ccr); in stm32_mdma_resume()
1218 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_resume()
1220 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_resume()
1226 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_resume()
1230 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_resume()
1281 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_desc_residue() local
1291 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_desc_residue()
1347 struct stm32_mdma_device *dmadev = devid; in stm32_mdma_irq_handler() local
1352 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0); in stm32_mdma_irq_handler()
1356 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR1); in stm32_mdma_irq_handler()
1358 dev_dbg(mdma2dev(dmadev), "spurious it\n"); in stm32_mdma_irq_handler()
1369 chan = &dmadev->chan[id]; in stm32_mdma_irq_handler()
1371 dev_dbg(mdma2dev(dmadev), "MDMA channel not initialized\n"); in stm32_mdma_irq_handler()
1377 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_irq_handler()
1378 ien = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)); in stm32_mdma_irq_handler()
1396 status = readl_relaxed(dmadev->base + STM32_MDMA_CESR(id)); in stm32_mdma_irq_handler()
1398 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CTEIF); in stm32_mdma_irq_handler()
1402 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CCTCIF); in stm32_mdma_irq_handler()
1407 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBRTIF); in stm32_mdma_irq_handler()
1411 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBTIF); in stm32_mdma_irq_handler()
1421 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CLTCIF); in stm32_mdma_irq_handler()
1438 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_alloc_chan_resources() local
1451 ret = pm_runtime_get_sync(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1457 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1465 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_free_chan_resources() local
1477 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_free_chan_resources()
1486 struct stm32_mdma_device *dmadev = ofdma->of_dma_data; in stm32_mdma_of_xlate() local
1492 dev_err(mdma2dev(dmadev), "Bad number of args\n"); in stm32_mdma_of_xlate()
1502 if (config.request >= dmadev->nr_requests) { in stm32_mdma_of_xlate()
1503 dev_err(mdma2dev(dmadev), "Bad request line\n"); in stm32_mdma_of_xlate()
1508 dev_err(mdma2dev(dmadev), "Priority level not supported\n"); in stm32_mdma_of_xlate()
1512 c = dma_get_any_slave_channel(&dmadev->ddev); in stm32_mdma_of_xlate()
1514 dev_err(mdma2dev(dmadev), "No more channels available\n"); in stm32_mdma_of_xlate()
1533 struct stm32_mdma_device *dmadev; in stm32_mdma_probe() local
1565 dmadev = devm_kzalloc(&pdev->dev, sizeof(*dmadev) + sizeof(u32) * count, in stm32_mdma_probe()
1567 if (!dmadev) in stm32_mdma_probe()
1570 dmadev->nr_channels = nr_channels; in stm32_mdma_probe()
1571 dmadev->nr_requests = nr_requests; in stm32_mdma_probe()
1573 dmadev->ahb_addr_masks, in stm32_mdma_probe()
1575 dmadev->nr_ahb_addr_masks = count; in stm32_mdma_probe()
1578 dmadev->base = devm_ioremap_resource(&pdev->dev, res); in stm32_mdma_probe()
1579 if (IS_ERR(dmadev->base)) in stm32_mdma_probe()
1580 return PTR_ERR(dmadev->base); in stm32_mdma_probe()
1582 dmadev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_mdma_probe()
1583 if (IS_ERR(dmadev->clk)) in stm32_mdma_probe()
1584 return dev_err_probe(&pdev->dev, PTR_ERR(dmadev->clk), in stm32_mdma_probe()
1587 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_probe()
1604 dd = &dmadev->ddev; in stm32_mdma_probe()
1638 for (i = 0; i < dmadev->nr_channels; i++) { in stm32_mdma_probe()
1639 chan = &dmadev->chan[i]; in stm32_mdma_probe()
1645 dmadev->irq = platform_get_irq(pdev, 0); in stm32_mdma_probe()
1646 if (dmadev->irq < 0) { in stm32_mdma_probe()
1647 ret = dmadev->irq; in stm32_mdma_probe()
1651 ret = devm_request_irq(&pdev->dev, dmadev->irq, stm32_mdma_irq_handler, in stm32_mdma_probe()
1652 0, dev_name(&pdev->dev), dmadev); in stm32_mdma_probe()
1662 ret = of_dma_controller_register(of_node, stm32_mdma_of_xlate, dmadev); in stm32_mdma_probe()
1669 platform_set_drvdata(pdev, dmadev); in stm32_mdma_probe()
1680 clk_disable_unprepare(dmadev->clk); in stm32_mdma_probe()
1688 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_suspend() local
1690 clk_disable_unprepare(dmadev->clk); in stm32_mdma_runtime_suspend()
1697 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_resume() local
1700 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_runtime_resume()
1713 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_pm_suspend() local
1721 for (id = 0; id < dmadev->nr_channels; id++) { in stm32_mdma_pm_suspend()
1722 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(id)); in stm32_mdma_pm_suspend()