235 static struct device *chan2dev(struct stm32_dma_chan *chan)  in chan2dev()  function
261 		dev_err(chan2dev(chan), "Dma bus width not supported\n");  in stm32_dma_get_width()
357 		dev_err(chan2dev(chan), "Dma burst size not supported\n");  in stm32_dma_get_burst()
476 		dev_dbg(chan2dev(chan), "%s(): clearing interrupt: 0x%08x\n",  in stm32_dma_stop()
523 	dev_dbg(chan2dev(chan), "SCR:   0x%08x\n", scr);  in stm32_dma_dump_reg()
524 	dev_dbg(chan2dev(chan), "NDTR:  0x%08x\n", ndtr);  in stm32_dma_dump_reg()
525 	dev_dbg(chan2dev(chan), "SPAR:  0x%08x\n", spar);  in stm32_dma_dump_reg()
526 	dev_dbg(chan2dev(chan), "SM0AR: 0x%08x\n", sm0ar);  in stm32_dma_dump_reg()
527 	dev_dbg(chan2dev(chan), "SM1AR: 0x%08x\n", sm1ar);  in stm32_dma_dump_reg()
528 	dev_dbg(chan2dev(chan), "SFCR:  0x%08x\n", sfcr);  in stm32_dma_dump_reg()
589 	dev_dbg(chan2dev(chan), "vchan %pK: started\n", &chan->vchan);  in stm32_dma_start_transfer()
610 			dev_dbg(chan2dev(chan), "CT=1 <=> SM0AR: 0x%08x\n",  in stm32_dma_configure_next_sg()
615 			dev_dbg(chan2dev(chan), "CT=0 <=> SM1AR: 0x%08x\n",  in stm32_dma_configure_next_sg()
666 				dev_err(chan2dev(chan), "FIFO Error\n");  in stm32_dma_chan_irq()
668 				dev_dbg(chan2dev(chan), "FIFO over/underrun\n");  in stm32_dma_chan_irq()
675 			dev_dbg(chan2dev(chan), "Direct mode overrun\n");  in stm32_dma_chan_irq()
679 		dev_err(chan2dev(chan), "DMA error: status=0x%08x\n", status);  in stm32_dma_chan_irq()
681 			dev_err(chan2dev(chan), "chan disabled by HW\n");  in stm32_dma_chan_irq()
696 		dev_dbg(chan2dev(chan), "vchan %pK: issued\n", &chan->vchan);  in stm32_dma_issue_pending()
821 		dev_err(chan2dev(chan), "Dma direction is not supported\n");  in stm32_dma_set_xfer_param()
854 		dev_err(chan2dev(chan), "dma channel is not configured\n");  in stm32_dma_prep_slave_sg()
859 		dev_err(chan2dev(chan), "Invalid segment length %d\n", sg_len);  in stm32_dma_prep_slave_sg()
883 			dev_err(chan2dev(chan), "nb items not supported\n");  in stm32_dma_prep_slave_sg()
918 		dev_err(chan2dev(chan), "Invalid buffer/period len\n");  in stm32_dma_prep_dma_cyclic()
923 		dev_err(chan2dev(chan), "dma channel is not configured\n");  in stm32_dma_prep_dma_cyclic()
928 		dev_err(chan2dev(chan), "buf_len not multiple of period_len\n");  in stm32_dma_prep_dma_cyclic()
939 		dev_err(chan2dev(chan), "Request not allowed when dma busy\n");  in stm32_dma_prep_dma_cyclic()
949 		dev_err(chan2dev(chan), "number of items not supported\n");  in stm32_dma_prep_dma_cyclic()
1207 	dev_dbg(chan2dev(chan), "Freeing channel %d\n", chan->id);  in stm32_dma_free_chan_resources()
1391 				       dev_name(chan2dev(chan)), chan);  in stm32_dma_probe()