115 		int src_cnt, u32 addr);
181 			     unsigned int src_cnt)  in prep_dma_xor_dbg()  argument
186 	for (i = 0; i < src_cnt; i++)  in prep_dma_xor_dbg()
192 			    unsigned int src_cnt)  in prep_dma_pq_dbg()  argument
197 	for (i = 0; i < src_cnt; i++)  in prep_dma_pq_dbg()
205 				    unsigned int src_cnt,  in prep_dma_pqzero_sum_dbg()  argument
212 		for (i = 0; i < src_cnt; i++)  in prep_dma_pqzero_sum_dbg()
215 		for (i = 0; i < src_cnt; i++)  in prep_dma_pqzero_sum_dbg()
221 		pr_debug("\t0x%016llx ", src[src_cnt + i]);  in prep_dma_pqzero_sum_dbg()
264 	desc->src_cnt = 0;  in ppc440spe_desc_init_null_xor()
272 					 int src_cnt, unsigned long flags)  in ppc440spe_desc_init_xor()  argument
278 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_xor()
281 	hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt;  in ppc440spe_desc_init_xor()
292 		int dst_cnt, int src_cnt, unsigned long flags)  in ppc440spe_desc_init_dma2pq()  argument
298 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma2pq()
318 				int dst_cnt, int src_cnt, unsigned long flags,  in ppc440spe_desc_init_dma01pq()  argument
327 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma01pq()
432 				int dst_cnt, int src_cnt)  in ppc440spe_desc_init_dma01pqzero_sum()  argument
458 		iter->src_cnt = 0;  in ppc440spe_desc_init_dma01pqzero_sum()
466 		if (i++ < src_cnt)  in ppc440spe_desc_init_dma01pqzero_sum()
494 	desc->src_cnt = src_cnt;  in ppc440spe_desc_init_dma01pqzero_sum()
508 	desc->src_cnt = 1;  in ppc440spe_desc_init_memcpy()
793 static int ppc440spe_chan_xor_slot_count(size_t len, int src_cnt,  in ppc440spe_chan_xor_slot_count()  argument
799 	slot_cnt = *slots_per_op = (src_cnt + XOR_MAX_OPS - 1)/XOR_MAX_OPS;  in ppc440spe_chan_xor_slot_count()
815 		int src_cnt, size_t len)  in ppc440spe_dma2_pq_slot_count()  argument
821 	for (i = 1; i < src_cnt; i++) {  in ppc440spe_dma2_pq_slot_count()
830 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
836 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
843 			if (i == src_cnt-2 || (order == -1  in ppc440spe_dma2_pq_slot_count()
850 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
854 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
858 				if (i == src_cnt-1)  in ppc440spe_dma2_pq_slot_count()
875 	if (src_cnt <= 1 || (state != 1 && state != 2)) {  in ppc440spe_dma2_pq_slot_count()
877 			__func__, src_cnt, state, addr_count, order);  in ppc440spe_dma2_pq_slot_count()
878 		for (i = 0; i < src_cnt; i++)  in ppc440spe_dma2_pq_slot_count()
1253 static int ppc440spe_can_rxor(struct page **srcs, int src_cnt, size_t len)  in ppc440spe_can_rxor()  argument
1258 	if (unlikely(!(src_cnt > 1)))  in ppc440spe_can_rxor()
1261 	BUG_ON(src_cnt > ARRAY_SIZE(ppc440spe_rxor_srcs));  in ppc440spe_can_rxor()
1264 	for (i = 0; i < src_cnt; i++) {  in ppc440spe_can_rxor()
1269 	src_cnt = idx;  in ppc440spe_can_rxor()
1271 	for (i = 1; i < src_cnt; i++) {  in ppc440spe_can_rxor()
1289 			if ((i == src_cnt - 2) ||  in ppc440spe_can_rxor()
1330 	struct page **src_lst, int src_cnt, size_t src_sz)  in ppc440spe_adma_estimate()  argument
1353 		if (dst_cnt == 1 && src_cnt == 2 && dst_lst[0] == src_lst[1])  in ppc440spe_adma_estimate()
1355 		else if (ppc440spe_can_rxor(src_lst, src_cnt, src_sz))  in ppc440spe_adma_estimate()
1372 	int src_cnt, size_t src_sz)  in ppc440spe_async_tx_find_best_channel()  argument
1388 			if (src_cnt == 1 && dst_lst[1] == src_lst[0])  in ppc440spe_async_tx_find_best_channel()
1390 			if (src_cnt == 2 && dst_lst[1] == src_lst[1])  in ppc440spe_async_tx_find_best_channel()
1406 					dst_cnt, src_lst, src_cnt, src_sz);  in ppc440spe_async_tx_find_best_channel()
1428 	if (entry_idx < 0 || entry_idx >= (tdesc->src_cnt + tdesc->dst_cnt)) {  in ppc440spe_get_group_entry()
1430 			__func__, entry_idx, tdesc->src_cnt, tdesc->dst_cnt);  in ppc440spe_get_group_entry()
2020 		dma_addr_t *dma_src, u32 src_cnt, size_t len,  in ppc440spe_adma_prep_dma_xor()  argument
2030 				     dma_dest, dma_src, src_cnt));  in ppc440spe_adma_prep_dma_xor()
2037 		ppc440spe_chan->device->id, __func__, src_cnt, len,  in ppc440spe_adma_prep_dma_xor()
2041 	slot_cnt = ppc440spe_chan_xor_slot_count(len, src_cnt, &slots_per_op);  in ppc440spe_adma_prep_dma_xor()
2046 		ppc440spe_desc_init_xor(group_start, src_cnt, flags);  in ppc440spe_adma_prep_dma_xor()
2048 		while (src_cnt--)  in ppc440spe_adma_prep_dma_xor()
2050 				dma_src[src_cnt], src_cnt);  in ppc440spe_adma_prep_dma_xor()
2062 				int src_cnt);
2070 		dma_addr_t *src, int src_cnt)  in ppc440spe_adma_init_dma2rxor_slot()  argument
2075 	for (i = 0; i < src_cnt; i++) {  in ppc440spe_adma_init_dma2rxor_slot()
2077 						 desc->src_cnt, (u32)src[i]);  in ppc440spe_adma_init_dma2rxor_slot()
2087 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_mult()  argument
2108 		sw_desc->src_cnt = src_cnt;  in ppc440spe_dma01_prep_mult()
2173 		dma_addr_t *dst, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_sum_product()  argument
2194 		sw_desc->src_cnt = src_cnt;  in ppc440spe_dma01_prep_sum_product()
2277 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma01_prep_pq()  argument
2286 		 __func__, dst_cnt, src_cnt, len);  in ppc440spe_dma01_prep_pq()
2299 		if (src_cnt > 1 &&  in ppc440spe_dma01_prep_pq()
2304 			if (src_cnt != 2) {  in ppc440spe_dma01_prep_pq()
2344 		slot_cnt = src_cnt;  in ppc440spe_dma01_prep_pq()
2367 			slot_cnt += src_cnt - 2;  in ppc440spe_dma01_prep_pq()
2369 			slot_cnt += src_cnt - 3;  in ppc440spe_dma01_prep_pq()
2383 		ppc440spe_desc_init_dma01pq(sw_desc, dst_cnt, src_cnt,  in ppc440spe_dma01_prep_pq()
2390 		while (src_cnt--) {  in ppc440spe_dma01_prep_pq()
2391 			ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],  in ppc440spe_dma01_prep_pq()
2392 						  src_cnt);  in ppc440spe_dma01_prep_pq()
2401 				mult = scf[src_cnt];  in ppc440spe_dma01_prep_pq()
2403 				mult, src_cnt,  dst_cnt - 1);  in ppc440spe_dma01_prep_pq()
2422 		dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt,  in ppc440spe_dma2_prep_pq()  argument
2435 	descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len);  in ppc440spe_dma2_prep_pq()
2449 			ppc440spe_desc_init_dma2pq(iter, dst_cnt, src_cnt,  in ppc440spe_dma2_prep_pq()
2464 								  src_cnt);  in ppc440spe_dma2_prep_pq()
2489 		while (src_cnt--) {  in ppc440spe_dma2_prep_pq()
2493 			ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt],  in ppc440spe_dma2_prep_pq()
2494 						  src_cnt);  in ppc440spe_dma2_prep_pq()
2496 				mult = scf[src_cnt];  in ppc440spe_dma2_prep_pq()
2498 					mult, src_cnt, dst_cnt - 1);  in ppc440spe_dma2_prep_pq()
2511 		unsigned int src_cnt, const unsigned char *scf,  in ppc440spe_adma_prep_dma_pq()  argument
2521 				    dst, src, src_cnt));  in ppc440spe_adma_prep_dma_pq()
2524 	BUG_ON(!src_cnt);  in ppc440spe_adma_prep_dma_pq()
2526 	if (src_cnt == 1 && dst[1] == src[0]) {  in ppc440spe_adma_prep_dma_pq()
2534 				dest, 2, src, src_cnt, scf, len, flags);  in ppc440spe_adma_prep_dma_pq()
2538 	if (src_cnt == 2 && dst[1] == src[1]) {  in ppc440spe_adma_prep_dma_pq()
2560 		ppc440spe_chan->device->id, __func__, src_cnt, len,  in ppc440spe_adma_prep_dma_pq()
2567 				dst, dst_cnt, src, src_cnt, scf,  in ppc440spe_adma_prep_dma_pq()
2573 				dst, dst_cnt, src, src_cnt, scf,  in ppc440spe_adma_prep_dma_pq()
2587 		unsigned int src_cnt, const unsigned char *scf, size_t len,  in ppc440spe_adma_prep_dma_pqzero_sum()  argument
2608 					    src, src_cnt, scf));  in ppc440spe_adma_prep_dma_pqzero_sum()
2618 	slot_cnt = src_cnt + dst_cnt * 2;  in ppc440spe_adma_prep_dma_pqzero_sum()
2625 		ppc440spe_desc_init_dma01pqzero_sum(sw_desc, dst_cnt, src_cnt);  in ppc440spe_adma_prep_dma_pqzero_sum()
2647 			iter->src_cnt = 0;  in ppc440spe_adma_prep_dma_pqzero_sum()
2679 			iter->src_cnt = 0;  in ppc440spe_adma_prep_dma_pqzero_sum()
2743 						    src[src_cnt - 1]);  in ppc440spe_adma_prep_dma_pqzero_sum()
2750 							    scf[src_cnt - 1]);  in ppc440spe_adma_prep_dma_pqzero_sum()
2752 			if (!(--src_cnt))  in ppc440spe_adma_prep_dma_pqzero_sum()
2765 		struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,  in ppc440spe_adma_prep_dma_xor_zero_sum()  argument
2777 						src_cnt - 1, 0, len,  in ppc440spe_adma_prep_dma_xor_zero_sum()
3087 			int src_cnt)  in ppc440spe_desc_set_xor_src_cnt()  argument
3092 	hw_desc->cbc |= src_cnt;  in ppc440spe_desc_set_xor_src_cnt()
3225 		struct ppc440spe_rxor *cursor, int index, int src_cnt)  in ppc440spe_adma_dma2rxor_inc_addr()  argument
3228 	if (index == src_cnt - 1) {  in ppc440spe_adma_dma2rxor_inc_addr()
3243 		int src_cnt, u32 addr)  in ppc440spe_adma_dma2rxor_prep_src()  argument
3262 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3267 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3274 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3279 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3291 		if (index == src_cnt-2 || (sign == -1  in ppc440spe_adma_dma2rxor_prep_src()
3300 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3307 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3309 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3317 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3319 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3327 			if (index == src_cnt-1) {  in ppc440spe_adma_dma2rxor_prep_src()
3329 					desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3339 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()
3348 				desc, cursor, index, src_cnt);  in ppc440spe_adma_dma2rxor_prep_src()