930 				    DMA_CUED_XOR_BASE) {  in ppc440spe_adma_device_clear_eot_status()
1862 	xcb->ops[xor_arg_no].h |= DMA_CUED_XOR_BASE;  in ppc440spe_rxor_set_src()
2126 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2152 					     DMA_CUED_XOR_BASE, dst[0], 0);  in ppc440spe_dma01_prep_mult()
2208 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2236 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2261 		ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE,  in ppc440spe_dma01_prep_sum_product()
2818 	ppc440spe_desc_set_dest_addr(iter, chan, DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_zero_op()
2875 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pq_set_dest()
2881 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pq_set_dest()
2883 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pq_set_dest()
2918 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2922 					DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2951 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2961 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2965 							DMA_CUED_XOR_BASE,  in ppc440spe_adma_pq_set_dest()
2982 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
2987 				DMA_CUED_XOR_BASE |  in ppc440spe_adma_pq_set_dest()
3053 						DMA_CUED_XOR_BASE, paddr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3055 						DMA_CUED_XOR_BASE, qaddr, 1);  in ppc440spe_adma_pqzero_sum_set_dest()
3065 						DMA_CUED_XOR_BASE, addr, 0);  in ppc440spe_adma_pqzero_sum_set_dest()
3140 				haddr |= DMA_CUED_XOR_BASE;  in ppc440spe_adma_pq_set_src()