Lines Matching +full:mixed +full:- +full:burst
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013-2014 Renesas Electronics Europe Ltd.
10 #include <linux/dma-mapping.h>
23 #include <dt-bindings/dma/nbpfaxi.h>
105 * 1. high-level descriptor, containing a struct dma_async_tx_descriptor object
109 * allocated from coherent memory - one per SG segment
112 * together with link descriptors as mixed (DMA / CPU) objects, or (b)
116 * Therefore for both cases (a) and (b) at run-time objects (2) and (3) shall be
143 * struct nbpf_desc - DMA transfer descriptor
162 #define NBPF_DESCS_PER_PAGE ((PAGE_SIZE - sizeof(struct list_head)) / \
176 * struct nbpf_channel - one DMAC channel
185 * @slave_src_burst: maximum source slave burst size in bytes
188 * @slave_dst_burst: maximum destination slave burst size in bytes
190 * @dmarq_cfg: DMA request line configuration - high / low, edge / level for NBPF_CHAN_CFG
197 * @done: list of completed descriptors, waiting post-processing
198 * @desc_page: list of additionally allocated descriptor pages - if any
296 * we try to separate the hardware-specific part from the (largely) generic
303 /* Hardware-specific part */
308 u32 data = ioread32(chan->base + offset); in nbpf_chan_read()
309 dev_dbg(chan->dma_chan.device->dev, "%s(0x%p + 0x%x) = 0x%x\n", in nbpf_chan_read()
310 __func__, chan->base, offset, data); in nbpf_chan_read()
317 iowrite32(data, chan->base + offset); in nbpf_chan_write()
318 dev_dbg(chan->dma_chan.device->dev, "%s(0x%p + 0x%x) = 0x%x\n", in nbpf_chan_write()
319 __func__, chan->base, offset, data); in nbpf_chan_write()
325 u32 data = ioread32(nbpf->base + offset); in nbpf_read()
326 dev_dbg(nbpf->dma_dev.dev, "%s(0x%p + 0x%x) = 0x%x\n", in nbpf_read()
327 __func__, nbpf->base, offset, data); in nbpf_read()
334 iowrite32(data, nbpf->base + offset); in nbpf_write()
335 dev_dbg(nbpf->dma_dev.dev, "%s(0x%p + 0x%x) = 0x%x\n", in nbpf_write()
336 __func__, nbpf->base, offset, data); in nbpf_write()
346 u32 status = nbpf_read(chan->nbpf, NBPF_DSTAT_END); in nbpf_status_get()
348 return status & BIT(chan - chan->nbpf->chan); in nbpf_status_get()
363 return nbpf->chan + __ffs(error); in nbpf_error_get_channel()
374 for (i = 1000; i; i--) { in nbpf_error_clear()
382 dev_err(chan->dma_chan.device->dev, in nbpf_error_clear()
390 struct nbpf_channel *chan = desc->chan; in nbpf_start()
391 struct nbpf_link_desc *ldesc = list_first_entry(&desc->sg, struct nbpf_link_desc, node); in nbpf_start()
393 nbpf_chan_write(chan, NBPF_CHAN_NXLA, (u32)ldesc->hwdesc_dma_addr); in nbpf_start()
395 chan->paused = false; in nbpf_start()
397 /* Software trigger MEMCPY - only MEMCPY uses the block mode */ in nbpf_start()
398 if (ldesc->hwdesc->config & NBPF_CHAN_CFG_TM) in nbpf_start()
401 dev_dbg(chan->nbpf->dma_dev.dev, "%s(): next 0x%x, cur 0x%x\n", __func__, in nbpf_start()
409 chan->dmarq_cfg = (chan->flags & NBPF_SLAVE_RQ_HIGH ? NBPF_CHAN_CFG_HIEN : 0) | in nbpf_chan_prepare()
410 (chan->flags & NBPF_SLAVE_RQ_LOW ? NBPF_CHAN_CFG_LOEN : 0) | in nbpf_chan_prepare()
411 (chan->flags & NBPF_SLAVE_RQ_LEVEL ? in nbpf_chan_prepare()
413 chan->terminal; in nbpf_chan_prepare()
419 chan->dmarq_cfg = NBPF_CHAN_CFG_AM & 0x400; in nbpf_chan_prepare_default()
420 chan->terminal = 0; in nbpf_chan_prepare_default()
421 chan->flags = 0; in nbpf_chan_prepare_default()
429 * per-transfer configuration will be loaded from transfer descriptors. in nbpf_chan_configure()
431 nbpf_chan_write(chan, NBPF_CHAN_CFG, NBPF_CHAN_CFG_DMS | chan->dmarq_cfg); in nbpf_chan_configure()
437 int max_burst = nbpf->config->buffer_size * 8; in nbpf_xfer_ds()
439 if (nbpf->max_burst_mem_read || nbpf->max_burst_mem_write) { in nbpf_xfer_ds()
442 max_burst = min_not_zero(nbpf->max_burst_mem_read, in nbpf_xfer_ds()
443 nbpf->max_burst_mem_write); in nbpf_xfer_ds()
446 if (nbpf->max_burst_mem_read) in nbpf_xfer_ds()
447 max_burst = nbpf->max_burst_mem_read; in nbpf_xfer_ds()
450 if (nbpf->max_burst_mem_write) in nbpf_xfer_ds()
451 max_burst = nbpf->max_burst_mem_write; in nbpf_xfer_ds()
464 enum dma_slave_buswidth width, u32 burst) in nbpf_xfer_size() argument
468 if (!burst) in nbpf_xfer_size()
469 burst = 1; in nbpf_xfer_size()
473 size = 8 * burst; in nbpf_xfer_size()
477 size = 4 * burst; in nbpf_xfer_size()
481 size = 2 * burst; in nbpf_xfer_size()
488 size = burst; in nbpf_xfer_size()
499 * a timeout, if no more data arrives - receive what's already there. We want to
502 * to recognise such slaves. We use a data-width check to distinguish between
510 struct nbpf_link_reg *hwdesc = ldesc->hwdesc; in nbpf_prep_one()
511 struct nbpf_desc *desc = ldesc->desc; in nbpf_prep_one()
512 struct nbpf_channel *chan = desc->chan; in nbpf_prep_one()
513 struct device *dev = chan->dma_chan.device->dev; in nbpf_prep_one()
517 hwdesc->header = NBPF_HEADER_WBD | NBPF_HEADER_LV | in nbpf_prep_one()
520 hwdesc->src_addr = src; in nbpf_prep_one()
521 hwdesc->dst_addr = dst; in nbpf_prep_one()
522 hwdesc->transaction_size = size; in nbpf_prep_one()
533 * e.g. with serial drivers like amba-pl011.c. For reception it sets up in nbpf_prep_one()
536 * in the Rx FIFO. For this to work with the RAM side using burst in nbpf_prep_one()
540 mem_xfer = nbpf_xfer_ds(chan->nbpf, size, direction); in nbpf_prep_one()
544 can_burst = chan->slave_src_width >= 3; in nbpf_prep_one()
546 chan->slave_src_burst : chan->slave_src_width); in nbpf_prep_one()
551 if (mem_xfer > chan->slave_src_burst && !can_burst) in nbpf_prep_one()
552 mem_xfer = chan->slave_src_burst; in nbpf_prep_one()
553 /* Device-to-RAM DMA is unreliable without REQD set */ in nbpf_prep_one()
554 hwdesc->config = NBPF_CHAN_CFG_SAD | (NBPF_CHAN_CFG_DDS & (mem_xfer << 16)) | in nbpf_prep_one()
560 slave_xfer = min(mem_xfer, chan->slave_dst_width >= 3 ? in nbpf_prep_one()
561 chan->slave_dst_burst : chan->slave_dst_width); in nbpf_prep_one()
562 hwdesc->config = NBPF_CHAN_CFG_DAD | (NBPF_CHAN_CFG_SDS & (mem_xfer << 12)) | in nbpf_prep_one()
567 hwdesc->config = NBPF_CHAN_CFG_TCM | NBPF_CHAN_CFG_TM | in nbpf_prep_one()
573 return -EINVAL; in nbpf_prep_one()
576 hwdesc->config |= chan->dmarq_cfg | (last ? 0 : NBPF_CHAN_CFG_DEM) | in nbpf_prep_one()
579 dev_dbg(dev, "%s(): desc @ %pad: hdr 0x%x, cfg 0x%x, %zu @ %pad -> %pad\n", in nbpf_prep_one()
580 __func__, &ldesc->hwdesc_dma_addr, hwdesc->header, in nbpf_prep_one()
581 hwdesc->config, size, &src, &dst); in nbpf_prep_one()
583 dma_sync_single_for_device(dev, ldesc->hwdesc_dma_addr, sizeof(*hwdesc), in nbpf_prep_one()
607 dev_dbg(dchan->device->dev, "Entry %s()\n", __func__); in nbpf_issue_pending()
609 spin_lock_irqsave(&chan->lock, flags); in nbpf_issue_pending()
610 if (list_empty(&chan->queued)) in nbpf_issue_pending()
613 list_splice_tail_init(&chan->queued, &chan->active); in nbpf_issue_pending()
615 if (!chan->running) { in nbpf_issue_pending()
616 struct nbpf_desc *desc = list_first_entry(&chan->active, in nbpf_issue_pending()
619 chan->running = desc; in nbpf_issue_pending()
623 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_issue_pending()
636 spin_lock_irqsave(&chan->lock, flags); in nbpf_tx_status()
637 running = chan->running ? chan->running->async_tx.cookie : -EINVAL; in nbpf_tx_status()
640 state->residue = nbpf_bytes_left(chan); in nbpf_tx_status()
641 dev_dbg(dchan->device->dev, "%s(): residue %u\n", __func__, in nbpf_tx_status()
642 state->residue); in nbpf_tx_status()
647 list_for_each_entry(desc, &chan->active, node) in nbpf_tx_status()
648 if (desc->async_tx.cookie == cookie) { in nbpf_tx_status()
654 list_for_each_entry(desc, &chan->queued, node) in nbpf_tx_status()
655 if (desc->async_tx.cookie == cookie) { in nbpf_tx_status()
661 state->residue = found ? desc->length : 0; in nbpf_tx_status()
664 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_tx_status()
667 if (chan->paused) in nbpf_tx_status()
676 struct nbpf_channel *chan = desc->chan; in nbpf_tx_submit()
680 spin_lock_irqsave(&chan->lock, flags); in nbpf_tx_submit()
682 list_add_tail(&desc->node, &chan->queued); in nbpf_tx_submit()
683 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_tx_submit()
685 dev_dbg(chan->dma_chan.device->dev, "Entry %s(%d)\n", __func__, cookie); in nbpf_tx_submit()
692 struct dma_chan *dchan = &chan->dma_chan; in nbpf_desc_page_alloc()
700 struct device *dev = dchan->device->dev; in nbpf_desc_page_alloc()
703 return -ENOMEM; in nbpf_desc_page_alloc()
708 for (i = 0, ldesc = dpage->ldesc, hwdesc = dpage->hwdesc; in nbpf_desc_page_alloc()
709 i < ARRAY_SIZE(dpage->ldesc); in nbpf_desc_page_alloc()
711 ldesc->hwdesc = hwdesc; in nbpf_desc_page_alloc()
712 list_add_tail(&ldesc->node, &lhead); in nbpf_desc_page_alloc()
713 ldesc->hwdesc_dma_addr = dma_map_single(dchan->device->dev, in nbpf_desc_page_alloc()
717 hwdesc, &ldesc->hwdesc_dma_addr); in nbpf_desc_page_alloc()
720 for (i = 0, desc = dpage->desc; in nbpf_desc_page_alloc()
721 i < ARRAY_SIZE(dpage->desc); in nbpf_desc_page_alloc()
723 dma_async_tx_descriptor_init(&desc->async_tx, dchan); in nbpf_desc_page_alloc()
724 desc->async_tx.tx_submit = nbpf_tx_submit; in nbpf_desc_page_alloc()
725 desc->chan = chan; in nbpf_desc_page_alloc()
726 INIT_LIST_HEAD(&desc->sg); in nbpf_desc_page_alloc()
727 list_add_tail(&desc->node, &head); in nbpf_desc_page_alloc()
734 spin_lock_irq(&chan->lock); in nbpf_desc_page_alloc()
735 list_splice_tail(&lhead, &chan->free_links); in nbpf_desc_page_alloc()
736 list_splice_tail(&head, &chan->free); in nbpf_desc_page_alloc()
737 list_add(&dpage->node, &chan->desc_page); in nbpf_desc_page_alloc()
738 spin_unlock_irq(&chan->lock); in nbpf_desc_page_alloc()
740 return ARRAY_SIZE(dpage->desc); in nbpf_desc_page_alloc()
745 struct nbpf_channel *chan = desc->chan; in nbpf_desc_put()
749 spin_lock_irqsave(&chan->lock, flags); in nbpf_desc_put()
750 list_for_each_entry_safe(ldesc, tmp, &desc->sg, node) in nbpf_desc_put()
751 list_move(&ldesc->node, &chan->free_links); in nbpf_desc_put()
753 list_add(&desc->node, &chan->free); in nbpf_desc_put()
754 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_desc_put()
763 spin_lock_irqsave(&chan->lock, flags); in nbpf_scan_acked()
764 list_for_each_entry_safe(desc, tmp, &chan->done, node) in nbpf_scan_acked()
765 if (async_tx_test_ack(&desc->async_tx) && desc->user_wait) { in nbpf_scan_acked()
766 list_move(&desc->node, &head); in nbpf_scan_acked()
767 desc->user_wait = false; in nbpf_scan_acked()
769 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_scan_acked()
772 list_del(&desc->node); in nbpf_scan_acked()
779 * before we re-acquire the lock buffers can be taken already, so we have to
780 * re-check after re-acquiring the lock and possibly retry, if buffers are gone
790 spin_lock_irq(&chan->lock); in nbpf_desc_get()
795 if (list_empty(&chan->free)) { in nbpf_desc_get()
797 spin_unlock_irq(&chan->lock); in nbpf_desc_get()
801 spin_lock_irq(&chan->lock); in nbpf_desc_get()
804 desc = list_first_entry(&chan->free, struct nbpf_desc, node); in nbpf_desc_get()
805 list_del(&desc->node); in nbpf_desc_get()
808 if (list_empty(&chan->free_links)) { in nbpf_desc_get()
810 spin_unlock_irq(&chan->lock); in nbpf_desc_get()
816 spin_lock_irq(&chan->lock); in nbpf_desc_get()
820 ldesc = list_first_entry(&chan->free_links, in nbpf_desc_get()
822 ldesc->desc = desc; in nbpf_desc_get()
824 prev->hwdesc->next = (u32)ldesc->hwdesc_dma_addr; in nbpf_desc_get()
827 list_move_tail(&ldesc->node, &desc->sg); in nbpf_desc_get()
833 prev->hwdesc->next = 0; in nbpf_desc_get()
835 spin_unlock_irq(&chan->lock); in nbpf_desc_get()
846 spin_lock_irqsave(&chan->lock, flags); in nbpf_chan_idle()
848 list_splice_init(&chan->done, &head); in nbpf_chan_idle()
849 list_splice_init(&chan->active, &head); in nbpf_chan_idle()
850 list_splice_init(&chan->queued, &head); in nbpf_chan_idle()
852 chan->running = NULL; in nbpf_chan_idle()
854 spin_unlock_irqrestore(&chan->lock, flags); in nbpf_chan_idle()
857 dev_dbg(chan->nbpf->dma_dev.dev, "%s(): force-free desc %p cookie %d\n", in nbpf_chan_idle()
858 __func__, desc, desc->async_tx.cookie); in nbpf_chan_idle()
859 list_del(&desc->node); in nbpf_chan_idle()
868 dev_dbg(dchan->device->dev, "Entry %s\n", __func__); in nbpf_pause()
870 chan->paused = true; in nbpf_pause()
882 dev_dbg(dchan->device->dev, "Entry %s\n", __func__); in nbpf_terminate_all()
883 dev_dbg(dchan->device->dev, "Terminating\n"); in nbpf_terminate_all()
896 dev_dbg(dchan->device->dev, "Entry %s\n", __func__); in nbpf_config()
899 * We could check config->slave_id to match chan->terminal here, in nbpf_config()
904 chan->slave_dst_addr = config->dst_addr; in nbpf_config()
905 chan->slave_dst_width = nbpf_xfer_size(chan->nbpf, in nbpf_config()
906 config->dst_addr_width, 1); in nbpf_config()
907 chan->slave_dst_burst = nbpf_xfer_size(chan->nbpf, in nbpf_config()
908 config->dst_addr_width, in nbpf_config()
909 config->dst_maxburst); in nbpf_config()
910 chan->slave_src_addr = config->src_addr; in nbpf_config()
911 chan->slave_src_width = nbpf_xfer_size(chan->nbpf, in nbpf_config()
912 config->src_addr_width, 1); in nbpf_config()
913 chan->slave_src_burst = nbpf_xfer_size(chan->nbpf, in nbpf_config()
914 config->src_addr_width, in nbpf_config()
915 config->src_maxburst); in nbpf_config()
956 desc->async_tx.flags = flags; in nbpf_prep_sg()
957 desc->async_tx.cookie = -EBUSY; in nbpf_prep_sg()
958 desc->user_wait = false; in nbpf_prep_sg()
964 list_for_each_entry(ldesc, &desc->sg, node) { in nbpf_prep_sg()
969 i == len - 1); in nbpf_prep_sg()
983 desc->length = data_len; in nbpf_prep_sg()
986 return &desc->async_tx; in nbpf_prep_sg()
1006 dev_dbg(dchan->device->dev, "%s(): %zu @ %pad -> %pad\n", in nbpf_prep_memcpy()
1020 dev_dbg(dchan->device->dev, "Entry %s()\n", __func__); in nbpf_prep_slave_sg()
1026 sg_dma_address(&slave_sg) = chan->slave_dst_addr; in nbpf_prep_slave_sg()
1031 sg_dma_address(&slave_sg) = chan->slave_src_addr; in nbpf_prep_slave_sg()
1045 INIT_LIST_HEAD(&chan->free); in nbpf_alloc_chan_resources()
1046 INIT_LIST_HEAD(&chan->free_links); in nbpf_alloc_chan_resources()
1047 INIT_LIST_HEAD(&chan->queued); in nbpf_alloc_chan_resources()
1048 INIT_LIST_HEAD(&chan->active); in nbpf_alloc_chan_resources()
1049 INIT_LIST_HEAD(&chan->done); in nbpf_alloc_chan_resources()
1055 dev_dbg(dchan->device->dev, "Entry %s(): terminal %u\n", __func__, in nbpf_alloc_chan_resources()
1056 chan->terminal); in nbpf_alloc_chan_resources()
1068 dev_dbg(dchan->device->dev, "Entry %s()\n", __func__); in nbpf_free_chan_resources()
1072 /* Clean up for if a channel is re-used for MEMCPY after slave DMA */ in nbpf_free_chan_resources()
1075 list_for_each_entry_safe(dpage, tmp, &chan->desc_page, node) { in nbpf_free_chan_resources()
1078 list_del(&dpage->node); in nbpf_free_chan_resources()
1079 for (i = 0, ldesc = dpage->ldesc; in nbpf_free_chan_resources()
1080 i < ARRAY_SIZE(dpage->ldesc); in nbpf_free_chan_resources()
1082 dma_unmap_single(dchan->device->dev, ldesc->hwdesc_dma_addr, in nbpf_free_chan_resources()
1083 sizeof(*ldesc->hwdesc), DMA_TO_DEVICE); in nbpf_free_chan_resources()
1091 struct nbpf_device *nbpf = ofdma->of_dma_data; in nbpf_of_xlate()
1095 if (dma_spec->args_count != 2) in nbpf_of_xlate()
1098 dchan = dma_get_any_slave_channel(&nbpf->dma_dev); in nbpf_of_xlate()
1102 dev_dbg(dchan->device->dev, "Entry %s(%pOFn)\n", __func__, in nbpf_of_xlate()
1103 dma_spec->np); in nbpf_of_xlate()
1107 chan->terminal = dma_spec->args[0]; in nbpf_of_xlate()
1108 chan->flags = dma_spec->args[1]; in nbpf_of_xlate()
1122 while (!list_empty(&chan->done)) { in nbpf_chan_tasklet()
1125 spin_lock_irq(&chan->lock); in nbpf_chan_tasklet()
1127 list_for_each_entry_safe(desc, tmp, &chan->done, node) { in nbpf_chan_tasklet()
1128 if (!desc->user_wait) { in nbpf_chan_tasklet()
1132 } else if (async_tx_test_ack(&desc->async_tx)) { in nbpf_chan_tasklet()
1137 list_del(&desc->node); in nbpf_chan_tasklet()
1138 spin_unlock_irq(&chan->lock); in nbpf_chan_tasklet()
1150 spin_unlock_irq(&chan->lock); in nbpf_chan_tasklet()
1154 dma_cookie_complete(&desc->async_tx); in nbpf_chan_tasklet()
1160 if (async_tx_test_ack(&desc->async_tx)) { in nbpf_chan_tasklet()
1161 list_del(&desc->node); in nbpf_chan_tasklet()
1164 desc->user_wait = true; in nbpf_chan_tasklet()
1168 dmaengine_desc_get_callback(&desc->async_tx, &cb); in nbpf_chan_tasklet()
1171 spin_unlock_irq(&chan->lock); in nbpf_chan_tasklet()
1193 dev_dbg(&chan->dma_chan.dev->device, "%s()\n", __func__); in nbpf_chan_irq()
1195 spin_lock(&chan->lock); in nbpf_chan_irq()
1196 desc = chan->running; in nbpf_chan_irq()
1205 list_move_tail(&desc->node, &chan->done); in nbpf_chan_irq()
1206 chan->running = NULL; in nbpf_chan_irq()
1208 if (!list_empty(&chan->active)) { in nbpf_chan_irq()
1209 desc = list_first_entry(&chan->active, in nbpf_chan_irq()
1212 chan->running = desc; in nbpf_chan_irq()
1216 spin_unlock(&chan->lock); in nbpf_chan_irq()
1219 tasklet_schedule(&chan->tasklet); in nbpf_chan_irq()
1229 dev_warn(nbpf->dma_dev.dev, "DMA error IRQ %u\n", irq); in nbpf_err_irq()
1247 struct dma_device *dma_dev = &nbpf->dma_dev; in nbpf_chan_probe()
1248 struct nbpf_channel *chan = nbpf->chan + n; in nbpf_chan_probe()
1251 chan->nbpf = nbpf; in nbpf_chan_probe()
1252 chan->base = nbpf->base + NBPF_REG_CHAN_OFFSET + NBPF_REG_CHAN_SIZE * n; in nbpf_chan_probe()
1253 INIT_LIST_HEAD(&chan->desc_page); in nbpf_chan_probe()
1254 spin_lock_init(&chan->lock); in nbpf_chan_probe()
1255 chan->dma_chan.device = dma_dev; in nbpf_chan_probe()
1256 dma_cookie_init(&chan->dma_chan); in nbpf_chan_probe()
1259 dev_dbg(dma_dev->dev, "%s(): channel %d: -> %p\n", __func__, n, chan->base); in nbpf_chan_probe()
1261 snprintf(chan->name, sizeof(chan->name), "nbpf %d", n); in nbpf_chan_probe()
1263 tasklet_setup(&chan->tasklet, nbpf_chan_tasklet); in nbpf_chan_probe()
1264 ret = devm_request_irq(dma_dev->dev, chan->irq, in nbpf_chan_probe()
1266 chan->name, chan); in nbpf_chan_probe()
1271 list_add_tail(&chan->dma_chan.device_node, in nbpf_chan_probe()
1272 &dma_dev->channels); in nbpf_chan_probe()
1293 struct device *dev = &pdev->dev; in nbpf_probe()
1294 struct device_node *np = dev->of_node; in nbpf_probe()
1308 return -ENODEV; in nbpf_probe()
1311 num_channels = cfg->num_channels; in nbpf_probe()
1316 return -ENOMEM; in nbpf_probe()
1318 dma_dev = &nbpf->dma_dev; in nbpf_probe()
1319 dma_dev->dev = dev; in nbpf_probe()
1322 nbpf->base = devm_ioremap_resource(dev, iomem); in nbpf_probe()
1323 if (IS_ERR(nbpf->base)) in nbpf_probe()
1324 return PTR_ERR(nbpf->base); in nbpf_probe()
1326 nbpf->clk = devm_clk_get(dev, NULL); in nbpf_probe()
1327 if (IS_ERR(nbpf->clk)) in nbpf_probe()
1328 return PTR_ERR(nbpf->clk); in nbpf_probe()
1330 of_property_read_u32(np, "max-burst-mem-read", in nbpf_probe()
1331 &nbpf->max_burst_mem_read); in nbpf_probe()
1332 of_property_read_u32(np, "max-burst-mem-write", in nbpf_probe()
1333 &nbpf->max_burst_mem_write); in nbpf_probe()
1335 nbpf->config = cfg; in nbpf_probe()
1342 for (irq = irq_res->start; irq <= irq_res->end; in nbpf_probe()
1354 return -ENXIO; in nbpf_probe()
1360 nbpf->chan[i].irq = irqbuf[0]; in nbpf_probe()
1369 for (i = 0, chan = nbpf->chan; i <= num_channels; in nbpf_probe()
1374 chan->irq = irqbuf[i]; in nbpf_probe()
1377 if (chan != nbpf->chan + num_channels) in nbpf_probe()
1378 return -EINVAL; in nbpf_probe()
1387 nbpf->chan[i].irq = irq; in nbpf_probe()
1395 nbpf->eirq = eirq; in nbpf_probe()
1397 INIT_LIST_HEAD(&dma_dev->channels); in nbpf_probe()
1406 dma_cap_set(DMA_MEMCPY, dma_dev->cap_mask); in nbpf_probe()
1407 dma_cap_set(DMA_SLAVE, dma_dev->cap_mask); in nbpf_probe()
1408 dma_cap_set(DMA_PRIVATE, dma_dev->cap_mask); in nbpf_probe()
1411 dma_dev->device_alloc_chan_resources in nbpf_probe()
1413 dma_dev->device_free_chan_resources = nbpf_free_chan_resources; in nbpf_probe()
1414 dma_dev->device_prep_dma_memcpy = nbpf_prep_memcpy; in nbpf_probe()
1415 dma_dev->device_tx_status = nbpf_tx_status; in nbpf_probe()
1416 dma_dev->device_issue_pending = nbpf_issue_pending; in nbpf_probe()
1421 * dma_dev->copy_align = 4; in nbpf_probe()
1427 dma_dev->device_prep_slave_sg = nbpf_prep_slave_sg; in nbpf_probe()
1428 dma_dev->device_config = nbpf_config; in nbpf_probe()
1429 dma_dev->device_pause = nbpf_pause; in nbpf_probe()
1430 dma_dev->device_terminate_all = nbpf_terminate_all; in nbpf_probe()
1432 dma_dev->src_addr_widths = NBPF_DMA_BUSWIDTHS; in nbpf_probe()
1433 dma_dev->dst_addr_widths = NBPF_DMA_BUSWIDTHS; in nbpf_probe()
1434 dma_dev->directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in nbpf_probe()
1438 ret = clk_prepare_enable(nbpf->clk); in nbpf_probe()
1457 clk_disable_unprepare(nbpf->clk); in nbpf_probe()
1467 devm_free_irq(&pdev->dev, nbpf->eirq, nbpf); in nbpf_remove()
1469 for (i = 0; i < nbpf->config->num_channels; i++) { in nbpf_remove()
1470 struct nbpf_channel *chan = nbpf->chan + i; in nbpf_remove()
1472 devm_free_irq(&pdev->dev, chan->irq, chan); in nbpf_remove()
1474 tasklet_kill(&chan->tasklet); in nbpf_remove()
1477 of_dma_controller_free(pdev->dev.of_node); in nbpf_remove()
1478 dma_async_device_unregister(&nbpf->dma_dev); in nbpf_remove()
1479 clk_disable_unprepare(nbpf->clk); in nbpf_remove()
1502 clk_disable_unprepare(nbpf->clk); in nbpf_runtime_suspend()
1509 return clk_prepare_enable(nbpf->clk); in nbpf_runtime_resume()
1519 .name = "dma-nbpf",