Lines Matching +full:d +full:- +full:phy
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013 - 2015 Linaro Ltd.
8 #include <linux/dma-mapping.h>
23 #include "virt-dma.h"
25 #define DRIVER_NAME "k3-dma"
83 struct k3_dma_phy *phy; member
105 struct k3_dma_phy *phy; member
134 static void k3_dma_pause_dma(struct k3_dma_phy *phy, bool on) in k3_dma_pause_dma() argument
139 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
141 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
143 val = readl_relaxed(phy->base + CX_CFG); in k3_dma_pause_dma()
145 writel_relaxed(val, phy->base + CX_CFG); in k3_dma_pause_dma()
149 static void k3_dma_terminate_chan(struct k3_dma_phy *phy, struct k3_dma_dev *d) in k3_dma_terminate_chan() argument
153 k3_dma_pause_dma(phy, false); in k3_dma_terminate_chan()
155 val = 0x1 << phy->idx; in k3_dma_terminate_chan()
156 writel_relaxed(val, d->base + INT_TC1_RAW); in k3_dma_terminate_chan()
157 writel_relaxed(val, d->base + INT_TC2_RAW); in k3_dma_terminate_chan()
158 writel_relaxed(val, d->base + INT_ERR1_RAW); in k3_dma_terminate_chan()
159 writel_relaxed(val, d->base + INT_ERR2_RAW); in k3_dma_terminate_chan()
162 static void k3_dma_set_desc(struct k3_dma_phy *phy, struct k3_desc_hw *hw) in k3_dma_set_desc() argument
164 writel_relaxed(hw->lli, phy->base + CX_LLI); in k3_dma_set_desc()
165 writel_relaxed(hw->count, phy->base + CX_CNT0); in k3_dma_set_desc()
166 writel_relaxed(hw->saddr, phy->base + CX_SRC); in k3_dma_set_desc()
167 writel_relaxed(hw->daddr, phy->base + CX_DST); in k3_dma_set_desc()
168 writel_relaxed(hw->config, phy->base + CX_CFG); in k3_dma_set_desc()
171 static u32 k3_dma_get_curr_cnt(struct k3_dma_dev *d, struct k3_dma_phy *phy) in k3_dma_get_curr_cnt() argument
175 cnt = readl_relaxed(d->base + CX_CUR_CNT + phy->idx * 0x10); in k3_dma_get_curr_cnt()
180 static u32 k3_dma_get_curr_lli(struct k3_dma_phy *phy) in k3_dma_get_curr_lli() argument
182 return readl_relaxed(phy->base + CX_LLI); in k3_dma_get_curr_lli()
185 static u32 k3_dma_get_chan_stat(struct k3_dma_dev *d) in k3_dma_get_chan_stat() argument
187 return readl_relaxed(d->base + CH_STAT); in k3_dma_get_chan_stat()
190 static void k3_dma_enable_dma(struct k3_dma_dev *d, bool on) in k3_dma_enable_dma() argument
194 writel_relaxed(0x0, d->base + CH_PRI); in k3_dma_enable_dma()
197 writel_relaxed(0xffff, d->base + INT_TC1_MASK); in k3_dma_enable_dma()
198 writel_relaxed(0xffff, d->base + INT_TC2_MASK); in k3_dma_enable_dma()
199 writel_relaxed(0xffff, d->base + INT_ERR1_MASK); in k3_dma_enable_dma()
200 writel_relaxed(0xffff, d->base + INT_ERR2_MASK); in k3_dma_enable_dma()
203 writel_relaxed(0x0, d->base + INT_TC1_MASK); in k3_dma_enable_dma()
204 writel_relaxed(0x0, d->base + INT_TC2_MASK); in k3_dma_enable_dma()
205 writel_relaxed(0x0, d->base + INT_ERR1_MASK); in k3_dma_enable_dma()
206 writel_relaxed(0x0, d->base + INT_ERR2_MASK); in k3_dma_enable_dma()
212 struct k3_dma_dev *d = (struct k3_dma_dev *)dev_id; in k3_dma_int_handler() local
215 u32 stat = readl_relaxed(d->base + INT_STAT); in k3_dma_int_handler()
216 u32 tc1 = readl_relaxed(d->base + INT_TC1); in k3_dma_int_handler()
217 u32 tc2 = readl_relaxed(d->base + INT_TC2); in k3_dma_int_handler()
218 u32 err1 = readl_relaxed(d->base + INT_ERR1); in k3_dma_int_handler()
219 u32 err2 = readl_relaxed(d->base + INT_ERR2); in k3_dma_int_handler()
228 p = &d->phy[i]; in k3_dma_int_handler()
229 c = p->vchan; in k3_dma_int_handler()
231 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_int_handler()
232 if (p->ds_run != NULL) { in k3_dma_int_handler()
233 vchan_cookie_complete(&p->ds_run->vd); in k3_dma_int_handler()
234 p->ds_done = p->ds_run; in k3_dma_int_handler()
235 p->ds_run = NULL; in k3_dma_int_handler()
237 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_int_handler()
240 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_int_handler()
241 if (p->ds_run != NULL) in k3_dma_int_handler()
242 vchan_cyclic_callback(&p->ds_run->vd); in k3_dma_int_handler()
243 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_int_handler()
248 dev_warn(d->slave.dev, "DMA ERR\n"); in k3_dma_int_handler()
251 writel_relaxed(irq_chan, d->base + INT_TC1_RAW); in k3_dma_int_handler()
252 writel_relaxed(irq_chan, d->base + INT_TC2_RAW); in k3_dma_int_handler()
253 writel_relaxed(err1, d->base + INT_ERR1_RAW); in k3_dma_int_handler()
254 writel_relaxed(err2, d->base + INT_ERR2_RAW); in k3_dma_int_handler()
257 tasklet_schedule(&d->task); in k3_dma_int_handler()
267 struct k3_dma_dev *d = to_k3_dma(c->vc.chan.device); in k3_dma_start_txd() local
268 struct virt_dma_desc *vd = vchan_next_desc(&c->vc); in k3_dma_start_txd()
270 if (!c->phy) in k3_dma_start_txd()
271 return -EAGAIN; in k3_dma_start_txd()
273 if (BIT(c->phy->idx) & k3_dma_get_chan_stat(d)) in k3_dma_start_txd()
274 return -EAGAIN; in k3_dma_start_txd()
277 if (c->phy->ds_run) in k3_dma_start_txd()
278 return -EAGAIN; in k3_dma_start_txd()
284 * fetch and remove request from vc->desc_issued in k3_dma_start_txd()
285 * so vc->desc_issued only contains desc pending in k3_dma_start_txd()
287 list_del(&ds->vd.node); in k3_dma_start_txd()
289 c->phy->ds_run = ds; in k3_dma_start_txd()
290 c->phy->ds_done = NULL; in k3_dma_start_txd()
292 k3_dma_set_desc(c->phy, &ds->desc_hw[0]); in k3_dma_start_txd()
295 c->phy->ds_run = NULL; in k3_dma_start_txd()
296 c->phy->ds_done = NULL; in k3_dma_start_txd()
297 return -EAGAIN; in k3_dma_start_txd()
302 struct k3_dma_dev *d = from_tasklet(d, t, task); in k3_dma_tasklet() local
307 /* check new dma request of running channel in vc->desc_issued */ in k3_dma_tasklet()
308 list_for_each_entry_safe(c, cn, &d->slave.channels, vc.chan.device_node) { in k3_dma_tasklet()
309 spin_lock_irq(&c->vc.lock); in k3_dma_tasklet()
310 p = c->phy; in k3_dma_tasklet()
311 if (p && p->ds_done) { in k3_dma_tasklet()
314 dev_dbg(d->slave.dev, "pchan %u: free\n", p->idx); in k3_dma_tasklet()
316 c->phy = NULL; in k3_dma_tasklet()
317 p->vchan = NULL; in k3_dma_tasklet()
320 spin_unlock_irq(&c->vc.lock); in k3_dma_tasklet()
323 /* check new channel request in d->chan_pending */ in k3_dma_tasklet()
324 spin_lock_irq(&d->lock); in k3_dma_tasklet()
325 for (pch = 0; pch < d->dma_channels; pch++) { in k3_dma_tasklet()
326 if (!(d->dma_channel_mask & (1 << pch))) in k3_dma_tasklet()
329 p = &d->phy[pch]; in k3_dma_tasklet()
331 if (p->vchan == NULL && !list_empty(&d->chan_pending)) { in k3_dma_tasklet()
332 c = list_first_entry(&d->chan_pending, in k3_dma_tasklet()
334 /* remove from d->chan_pending */ in k3_dma_tasklet()
335 list_del_init(&c->node); in k3_dma_tasklet()
338 p->vchan = c; in k3_dma_tasklet()
339 c->phy = p; in k3_dma_tasklet()
340 dev_dbg(d->slave.dev, "pchan %u: alloc vchan %p\n", pch, &c->vc); in k3_dma_tasklet()
343 spin_unlock_irq(&d->lock); in k3_dma_tasklet()
345 for (pch = 0; pch < d->dma_channels; pch++) { in k3_dma_tasklet()
346 if (!(d->dma_channel_mask & (1 << pch))) in k3_dma_tasklet()
350 p = &d->phy[pch]; in k3_dma_tasklet()
351 c = p->vchan; in k3_dma_tasklet()
353 spin_lock_irq(&c->vc.lock); in k3_dma_tasklet()
355 spin_unlock_irq(&c->vc.lock); in k3_dma_tasklet()
364 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_free_chan_resources() local
367 spin_lock_irqsave(&d->lock, flags); in k3_dma_free_chan_resources()
368 list_del_init(&c->node); in k3_dma_free_chan_resources()
369 spin_unlock_irqrestore(&d->lock, flags); in k3_dma_free_chan_resources()
371 vchan_free_chan_resources(&c->vc); in k3_dma_free_chan_resources()
372 c->ccfg = 0; in k3_dma_free_chan_resources()
379 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_tx_status() local
386 ret = dma_cookie_status(&c->vc.chan, cookie, state); in k3_dma_tx_status()
390 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_tx_status()
391 p = c->phy; in k3_dma_tx_status()
392 ret = c->status; in k3_dma_tx_status()
398 vd = vchan_find_desc(&c->vc, cookie); in k3_dma_tx_status()
399 if (vd && !c->cyclic) { in k3_dma_tx_status()
400 bytes = container_of(vd, struct k3_dma_desc_sw, vd)->size; in k3_dma_tx_status()
401 } else if ((!p) || (!p->ds_run)) { in k3_dma_tx_status()
404 struct k3_dma_desc_sw *ds = p->ds_run; in k3_dma_tx_status()
407 bytes = k3_dma_get_curr_cnt(d, p); in k3_dma_tx_status()
409 index = ((clli - ds->desc_hw_lli) / in k3_dma_tx_status()
411 for (; index < ds->desc_num; index++) { in k3_dma_tx_status()
412 bytes += ds->desc_hw[index].count; in k3_dma_tx_status()
414 if (!ds->desc_hw[index].lli) in k3_dma_tx_status()
418 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_tx_status()
426 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_issue_pending() local
429 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_issue_pending()
430 /* add request to vc->desc_issued */ in k3_dma_issue_pending()
431 if (vchan_issue_pending(&c->vc)) { in k3_dma_issue_pending()
432 spin_lock(&d->lock); in k3_dma_issue_pending()
433 if (!c->phy) { in k3_dma_issue_pending()
434 if (list_empty(&c->node)) { in k3_dma_issue_pending()
436 list_add_tail(&c->node, &d->chan_pending); in k3_dma_issue_pending()
438 tasklet_schedule(&d->task); in k3_dma_issue_pending()
439 dev_dbg(d->slave.dev, "vchan %p: issued\n", &c->vc); in k3_dma_issue_pending()
442 spin_unlock(&d->lock); in k3_dma_issue_pending()
444 dev_dbg(d->slave.dev, "vchan %p: nothing to issue\n", &c->vc); in k3_dma_issue_pending()
445 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_issue_pending()
451 if (num != ds->desc_num - 1) in k3_dma_fill_desc()
452 ds->desc_hw[num].lli = ds->desc_hw_lli + (num + 1) * in k3_dma_fill_desc()
455 ds->desc_hw[num].lli |= CX_LLI_CHAIN_EN; in k3_dma_fill_desc()
456 ds->desc_hw[num].count = len; in k3_dma_fill_desc()
457 ds->desc_hw[num].saddr = src; in k3_dma_fill_desc()
458 ds->desc_hw[num].daddr = dst; in k3_dma_fill_desc()
459 ds->desc_hw[num].config = ccfg; in k3_dma_fill_desc()
467 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_alloc_desc_resource() local
471 dev_dbg(chan->device->dev, "vch %p: sg num %d exceed max %d\n", in k3_dma_alloc_desc_resource()
472 &c->vc, num, lli_limit); in k3_dma_alloc_desc_resource()
480 ds->desc_hw = dma_pool_zalloc(d->pool, GFP_NOWAIT, &ds->desc_hw_lli); in k3_dma_alloc_desc_resource()
481 if (!ds->desc_hw) { in k3_dma_alloc_desc_resource()
482 dev_dbg(chan->device->dev, "vch %p: dma alloc fail\n", &c->vc); in k3_dma_alloc_desc_resource()
486 ds->desc_num = num; in k3_dma_alloc_desc_resource()
508 c->cyclic = 0; in k3_dma_prep_memcpy()
509 ds->size = len; in k3_dma_prep_memcpy()
512 if (!c->ccfg) { in k3_dma_prep_memcpy()
514 c->ccfg = CX_CFG_SRCINCR | CX_CFG_DSTINCR | CX_CFG_EN; in k3_dma_prep_memcpy()
515 c->ccfg |= (0xf << 20) | (0xf << 24); /* burst = 16 */ in k3_dma_prep_memcpy()
516 c->ccfg |= (0x3 << 12) | (0x3 << 16); /* width = 64 bit */ in k3_dma_prep_memcpy()
521 k3_dma_fill_desc(ds, dst, src, copy, num++, c->ccfg); in k3_dma_prep_memcpy()
525 len -= copy; in k3_dma_prep_memcpy()
528 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_memcpy()
529 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_memcpy()
546 c->cyclic = 0; in k3_dma_prep_slave_sg()
551 num += DIV_ROUND_UP(avail, DMA_MAX_SIZE) - 1; in k3_dma_prep_slave_sg()
558 k3_dma_config_write(chan, dir, &c->slave_config); in k3_dma_prep_slave_sg()
570 dst = c->dev_addr; in k3_dma_prep_slave_sg()
572 src = c->dev_addr; in k3_dma_prep_slave_sg()
576 k3_dma_fill_desc(ds, dst, src, len, num++, c->ccfg); in k3_dma_prep_slave_sg()
579 avail -= len; in k3_dma_prep_slave_sg()
583 ds->desc_hw[num-1].lli = 0; /* end of link */ in k3_dma_prep_slave_sg()
584 ds->size = total; in k3_dma_prep_slave_sg()
585 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_slave_sg()
602 dev_dbg(chan->device->dev, "%s: buf %pad, dst %pad, buf len %zu, period_len = %zu, dir %d\n", in k3_dma_prep_dma_cyclic()
603 __func__, &buf_addr, &to_k3_chan(chan)->dev_addr, in k3_dma_prep_dma_cyclic()
608 num += DIV_ROUND_UP(avail, modulo) - 1; in k3_dma_prep_dma_cyclic()
614 c->cyclic = 1; in k3_dma_prep_dma_cyclic()
619 k3_dma_config_write(chan, dir, &c->slave_config); in k3_dma_prep_dma_cyclic()
629 dst = c->dev_addr; in k3_dma_prep_dma_cyclic()
631 src = c->dev_addr; in k3_dma_prep_dma_cyclic()
638 since -= period_len; in k3_dma_prep_dma_cyclic()
642 k3_dma_fill_desc(ds, dst, src, len, num++, c->ccfg | en_tc2); in k3_dma_prep_dma_cyclic()
645 avail -= len; in k3_dma_prep_dma_cyclic()
649 ds->desc_hw[num - 1].lli |= ds->desc_hw_lli; in k3_dma_prep_dma_cyclic()
651 ds->size = total; in k3_dma_prep_dma_cyclic()
653 return vchan_tx_prep(&c->vc, &ds->vd, flags); in k3_dma_prep_dma_cyclic()
661 memcpy(&c->slave_config, cfg, sizeof(*cfg)); in k3_dma_config()
675 c->ccfg = CX_CFG_DSTINCR; in k3_dma_config_write()
676 c->dev_addr = cfg->src_addr; in k3_dma_config_write()
677 maxburst = cfg->src_maxburst; in k3_dma_config_write()
678 width = cfg->src_addr_width; in k3_dma_config_write()
680 c->ccfg = CX_CFG_SRCINCR; in k3_dma_config_write()
681 c->dev_addr = cfg->dst_addr; in k3_dma_config_write()
682 maxburst = cfg->dst_maxburst; in k3_dma_config_write()
683 width = cfg->dst_addr_width; in k3_dma_config_write()
696 c->ccfg |= (val << 12) | (val << 16); in k3_dma_config_write()
701 val = maxburst - 1; in k3_dma_config_write()
702 c->ccfg |= (val << 20) | (val << 24); in k3_dma_config_write()
703 c->ccfg |= CX_CFG_MEM2PER | CX_CFG_EN; in k3_dma_config_write()
706 c->ccfg |= c->vc.chan.chan_id << 4; in k3_dma_config_write()
715 struct k3_dma_dev *d = to_k3_dma(vd->tx.chan->device); in k3_dma_free_desc() local
717 dma_pool_free(d->pool, ds->desc_hw, ds->desc_hw_lli); in k3_dma_free_desc()
724 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_terminate_all() local
725 struct k3_dma_phy *p = c->phy; in k3_dma_terminate_all()
729 dev_dbg(d->slave.dev, "vchan %p: terminate all\n", &c->vc); in k3_dma_terminate_all()
732 spin_lock(&d->lock); in k3_dma_terminate_all()
733 list_del_init(&c->node); in k3_dma_terminate_all()
734 spin_unlock(&d->lock); in k3_dma_terminate_all()
737 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_terminate_all()
738 vchan_get_all_descriptors(&c->vc, &head); in k3_dma_terminate_all()
740 /* vchan is assigned to a pchan - stop the channel */ in k3_dma_terminate_all()
741 k3_dma_terminate_chan(p, d); in k3_dma_terminate_all()
742 c->phy = NULL; in k3_dma_terminate_all()
743 p->vchan = NULL; in k3_dma_terminate_all()
744 if (p->ds_run) { in k3_dma_terminate_all()
745 vchan_terminate_vdesc(&p->ds_run->vd); in k3_dma_terminate_all()
746 p->ds_run = NULL; in k3_dma_terminate_all()
748 p->ds_done = NULL; in k3_dma_terminate_all()
750 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_terminate_all()
751 vchan_dma_desc_free_list(&c->vc, &head); in k3_dma_terminate_all()
760 vchan_synchronize(&c->vc); in k3_dma_synchronize()
766 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_transfer_pause() local
767 struct k3_dma_phy *p = c->phy; in k3_dma_transfer_pause()
769 dev_dbg(d->slave.dev, "vchan %p: pause\n", &c->vc); in k3_dma_transfer_pause()
770 if (c->status == DMA_IN_PROGRESS) { in k3_dma_transfer_pause()
771 c->status = DMA_PAUSED; in k3_dma_transfer_pause()
775 spin_lock(&d->lock); in k3_dma_transfer_pause()
776 list_del_init(&c->node); in k3_dma_transfer_pause()
777 spin_unlock(&d->lock); in k3_dma_transfer_pause()
787 struct k3_dma_dev *d = to_k3_dma(chan->device); in k3_dma_transfer_resume() local
788 struct k3_dma_phy *p = c->phy; in k3_dma_transfer_resume()
791 dev_dbg(d->slave.dev, "vchan %p: resume\n", &c->vc); in k3_dma_transfer_resume()
792 spin_lock_irqsave(&c->vc.lock, flags); in k3_dma_transfer_resume()
793 if (c->status == DMA_PAUSED) { in k3_dma_transfer_resume()
794 c->status = DMA_IN_PROGRESS; in k3_dma_transfer_resume()
797 } else if (!list_empty(&c->vc.desc_issued)) { in k3_dma_transfer_resume()
798 spin_lock(&d->lock); in k3_dma_transfer_resume()
799 list_add_tail(&c->node, &d->chan_pending); in k3_dma_transfer_resume()
800 spin_unlock(&d->lock); in k3_dma_transfer_resume()
803 spin_unlock_irqrestore(&c->vc.lock, flags); in k3_dma_transfer_resume()
817 { .compatible = "hisilicon,k3-dma-1.0",
820 { .compatible = "hisilicon,hisi-pcm-asp-dma-1.0",
830 struct k3_dma_dev *d = ofdma->of_dma_data; in k3_of_dma_simple_xlate() local
831 unsigned int request = dma_spec->args[0]; in k3_of_dma_simple_xlate()
833 if (request >= d->dma_requests) in k3_of_dma_simple_xlate()
836 return dma_get_slave_channel(&(d->chans[request].vc.chan)); in k3_of_dma_simple_xlate()
842 struct k3_dma_dev *d; in k3_dma_probe() local
846 d = devm_kzalloc(&op->dev, sizeof(*d), GFP_KERNEL); in k3_dma_probe()
847 if (!d) in k3_dma_probe()
848 return -ENOMEM; in k3_dma_probe()
850 soc_data = device_get_match_data(&op->dev); in k3_dma_probe()
852 return -EINVAL; in k3_dma_probe()
854 d->base = devm_platform_ioremap_resource(op, 0); in k3_dma_probe()
855 if (IS_ERR(d->base)) in k3_dma_probe()
856 return PTR_ERR(d->base); in k3_dma_probe()
858 of_id = of_match_device(k3_pdma_dt_ids, &op->dev); in k3_dma_probe()
860 of_property_read_u32((&op->dev)->of_node, in k3_dma_probe()
861 "dma-channels", &d->dma_channels); in k3_dma_probe()
862 of_property_read_u32((&op->dev)->of_node, in k3_dma_probe()
863 "dma-requests", &d->dma_requests); in k3_dma_probe()
864 ret = of_property_read_u32((&op->dev)->of_node, in k3_dma_probe()
865 "dma-channel-mask", &d->dma_channel_mask); in k3_dma_probe()
867 dev_warn(&op->dev, in k3_dma_probe()
868 "dma-channel-mask doesn't exist, considering all as available.\n"); in k3_dma_probe()
869 d->dma_channel_mask = (u32)~0UL; in k3_dma_probe()
873 if (!(soc_data->flags & K3_FLAG_NOCLK)) { in k3_dma_probe()
874 d->clk = devm_clk_get(&op->dev, NULL); in k3_dma_probe()
875 if (IS_ERR(d->clk)) { in k3_dma_probe()
876 dev_err(&op->dev, "no dma clk\n"); in k3_dma_probe()
877 return PTR_ERR(d->clk); in k3_dma_probe()
882 ret = devm_request_irq(&op->dev, irq, in k3_dma_probe()
883 k3_dma_int_handler, 0, DRIVER_NAME, d); in k3_dma_probe()
887 d->irq = irq; in k3_dma_probe()
889 /* A DMA memory pool for LLIs, align on 32-byte boundary */ in k3_dma_probe()
890 d->pool = dmam_pool_create(DRIVER_NAME, &op->dev, in k3_dma_probe()
892 if (!d->pool) in k3_dma_probe()
893 return -ENOMEM; in k3_dma_probe()
895 /* init phy channel */ in k3_dma_probe()
896 d->phy = devm_kcalloc(&op->dev, in k3_dma_probe()
897 d->dma_channels, sizeof(struct k3_dma_phy), GFP_KERNEL); in k3_dma_probe()
898 if (d->phy == NULL) in k3_dma_probe()
899 return -ENOMEM; in k3_dma_probe()
901 for (i = 0; i < d->dma_channels; i++) { in k3_dma_probe()
904 if (!(d->dma_channel_mask & BIT(i))) in k3_dma_probe()
907 p = &d->phy[i]; in k3_dma_probe()
908 p->idx = i; in k3_dma_probe()
909 p->base = d->base + i * 0x40; in k3_dma_probe()
912 INIT_LIST_HEAD(&d->slave.channels); in k3_dma_probe()
913 dma_cap_set(DMA_SLAVE, d->slave.cap_mask); in k3_dma_probe()
914 dma_cap_set(DMA_MEMCPY, d->slave.cap_mask); in k3_dma_probe()
915 dma_cap_set(DMA_CYCLIC, d->slave.cap_mask); in k3_dma_probe()
916 d->slave.dev = &op->dev; in k3_dma_probe()
917 d->slave.device_free_chan_resources = k3_dma_free_chan_resources; in k3_dma_probe()
918 d->slave.device_tx_status = k3_dma_tx_status; in k3_dma_probe()
919 d->slave.device_prep_dma_memcpy = k3_dma_prep_memcpy; in k3_dma_probe()
920 d->slave.device_prep_slave_sg = k3_dma_prep_slave_sg; in k3_dma_probe()
921 d->slave.device_prep_dma_cyclic = k3_dma_prep_dma_cyclic; in k3_dma_probe()
922 d->slave.device_issue_pending = k3_dma_issue_pending; in k3_dma_probe()
923 d->slave.device_config = k3_dma_config; in k3_dma_probe()
924 d->slave.device_pause = k3_dma_transfer_pause; in k3_dma_probe()
925 d->slave.device_resume = k3_dma_transfer_resume; in k3_dma_probe()
926 d->slave.device_terminate_all = k3_dma_terminate_all; in k3_dma_probe()
927 d->slave.device_synchronize = k3_dma_synchronize; in k3_dma_probe()
928 d->slave.copy_align = DMAENGINE_ALIGN_8_BYTES; in k3_dma_probe()
931 d->chans = devm_kcalloc(&op->dev, in k3_dma_probe()
932 d->dma_requests, sizeof(struct k3_dma_chan), GFP_KERNEL); in k3_dma_probe()
933 if (d->chans == NULL) in k3_dma_probe()
934 return -ENOMEM; in k3_dma_probe()
936 for (i = 0; i < d->dma_requests; i++) { in k3_dma_probe()
937 struct k3_dma_chan *c = &d->chans[i]; in k3_dma_probe()
939 c->status = DMA_IN_PROGRESS; in k3_dma_probe()
940 INIT_LIST_HEAD(&c->node); in k3_dma_probe()
941 c->vc.desc_free = k3_dma_free_desc; in k3_dma_probe()
942 vchan_init(&c->vc, &d->slave); in k3_dma_probe()
946 ret = clk_prepare_enable(d->clk); in k3_dma_probe()
948 dev_err(&op->dev, "clk_prepare_enable failed: %d\n", ret); in k3_dma_probe()
952 k3_dma_enable_dma(d, true); in k3_dma_probe()
954 ret = dma_async_device_register(&d->slave); in k3_dma_probe()
958 ret = of_dma_controller_register((&op->dev)->of_node, in k3_dma_probe()
959 k3_of_dma_simple_xlate, d); in k3_dma_probe()
963 spin_lock_init(&d->lock); in k3_dma_probe()
964 INIT_LIST_HEAD(&d->chan_pending); in k3_dma_probe()
965 tasklet_setup(&d->task, k3_dma_tasklet); in k3_dma_probe()
966 platform_set_drvdata(op, d); in k3_dma_probe()
967 dev_info(&op->dev, "initialized\n"); in k3_dma_probe()
972 dma_async_device_unregister(&d->slave); in k3_dma_probe()
974 clk_disable_unprepare(d->clk); in k3_dma_probe()
981 struct k3_dma_dev *d = platform_get_drvdata(op); in k3_dma_remove() local
983 dma_async_device_unregister(&d->slave); in k3_dma_remove()
984 of_dma_controller_free((&op->dev)->of_node); in k3_dma_remove()
986 devm_free_irq(&op->dev, d->irq, d); in k3_dma_remove()
988 list_for_each_entry_safe(c, cn, &d->slave.channels, vc.chan.device_node) { in k3_dma_remove()
989 list_del(&c->vc.chan.device_node); in k3_dma_remove()
990 tasklet_kill(&c->vc.task); in k3_dma_remove()
992 tasklet_kill(&d->task); in k3_dma_remove()
993 clk_disable_unprepare(d->clk); in k3_dma_remove()
1000 struct k3_dma_dev *d = dev_get_drvdata(dev); in k3_dma_suspend_dev() local
1003 stat = k3_dma_get_chan_stat(d); in k3_dma_suspend_dev()
1005 dev_warn(d->slave.dev, in k3_dma_suspend_dev()
1006 "chan %d is running fail to suspend\n", stat); in k3_dma_suspend_dev()
1007 return -1; in k3_dma_suspend_dev()
1009 k3_dma_enable_dma(d, false); in k3_dma_suspend_dev()
1010 clk_disable_unprepare(d->clk); in k3_dma_suspend_dev()
1016 struct k3_dma_dev *d = dev_get_drvdata(dev); in k3_dma_resume_dev() local
1019 ret = clk_prepare_enable(d->clk); in k3_dma_resume_dev()
1021 dev_err(d->slave.dev, "clk_prepare_enable failed: %d\n", ret); in k3_dma_resume_dev()
1024 k3_dma_enable_dma(d, true); in k3_dma_resume_dev()