Lines Matching full:sdma
3 // drivers/dma/imx-sdma.c
38 #include <linux/platform_data/dma-imx-sdma.h>
47 /* SDMA registers */
104 * Error bit set in the CCB status field by the SDMA,
145 * 28 Lower WML Event(LWE) SDMA events reg to check for
149 * 29 Higher WML Event(HWE) SDMA events reg to check for
208 * @unused: padding. The SDMA engine expects an array of 128 byte
218 * struct sdma_state_registers - SDMA context for a channel
247 * struct sdma_context_data - sdma context specific to a channel
331 * struct sdma_channel - housekeeping for a SDMA channel
334 * @desc: sdma description including vd and other special member
335 * @sdma: pointer to the SDMA engine for this channel
337 * @direction: transfer type. Needed for setting SDMA script
339 * @peripheral_type: Peripheral type. Needed for setting SDMA script
358 * @data: specific sdma interface structure
365 struct sdma_engine *sdma; member
399 * @magic: "SDMA"
405 * @ram_code_start: offset of SDMA ram image in this firmware image
406 * @ram_code_size: size of SDMA ram image
407 * @script_addrs: Stores the start address of the SDMA scripts
408 * (in SDMA memory space)
446 /* clock ratio for AHB:SDMA core. 1:1 is 1, 2:1 is 0*/
571 .name = "imx25-sdma",
574 .name = "imx31-sdma",
577 .name = "imx35-sdma",
580 .name = "imx51-sdma",
583 .name = "imx53-sdma",
586 .name = "imx6q-sdma",
589 .name = "imx7d-sdma",
592 .name = "imx8mq-sdma",
601 { .compatible = "fsl,imx6q-sdma", .data = &sdma_imx6q, },
602 { .compatible = "fsl,imx53-sdma", .data = &sdma_imx53, },
603 { .compatible = "fsl,imx51-sdma", .data = &sdma_imx51, },
604 { .compatible = "fsl,imx35-sdma", .data = &sdma_imx35, },
605 { .compatible = "fsl,imx31-sdma", .data = &sdma_imx31, },
606 { .compatible = "fsl,imx25-sdma", .data = &sdma_imx25, },
607 { .compatible = "fsl,imx7d-sdma", .data = &sdma_imx7d, },
608 { .compatible = "fsl,imx8mq-sdma", .data = &sdma_imx8mq, },
618 static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event) in chnenbl_ofs() argument
620 u32 chnenbl0 = sdma->drvdata->chnenbl0; in chnenbl_ofs()
627 struct sdma_engine *sdma = sdmac->sdma; in sdma_config_ownership() local
634 evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
635 mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
636 dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
653 writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
654 writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
655 writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
660 static void sdma_enable_channel(struct sdma_engine *sdma, int channel) in sdma_enable_channel() argument
662 writel(BIT(channel), sdma->regs + SDMA_H_START); in sdma_enable_channel()
668 static int sdma_run_channel0(struct sdma_engine *sdma) in sdma_run_channel0() argument
673 sdma_enable_channel(sdma, 0); in sdma_run_channel0()
675 ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_STATSTOP, in sdma_run_channel0()
678 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); in sdma_run_channel0()
681 reg = readl(sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
684 writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
690 static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, in sdma_load_script() argument
693 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_script()
699 buf_virt = dma_alloc_coherent(sdma->dev, size, &buf_phys, GFP_KERNEL); in sdma_load_script()
704 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_script()
714 ret = sdma_run_channel0(sdma); in sdma_load_script()
716 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_script()
718 dma_free_coherent(sdma->dev, size, buf_virt, buf_phys); in sdma_load_script()
725 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_enable() local
728 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_enable()
730 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_enable()
732 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_enable()
737 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_disable() local
739 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_disable()
742 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_disable()
744 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_disable()
756 struct sdma_engine *sdma = sdmac->sdma; in sdma_start_desc() local
767 sdma->channel_control[channel].base_bd_ptr = desc->bd_phys; in sdma_start_desc()
768 sdma->channel_control[channel].current_bd_ptr = desc->bd_phys; in sdma_start_desc()
769 sdma_enable_channel(sdma, sdmac->channel); in sdma_start_desc()
810 * SDMA transaction status by the time the client tasklet is in sdma_update_channel_loop()
849 struct sdma_engine *sdma = dev_id; in sdma_int_handler() local
852 stat = readl_relaxed(sdma->regs + SDMA_H_INTR); in sdma_int_handler()
853 writel_relaxed(stat, sdma->regs + SDMA_H_INTR); in sdma_int_handler()
859 struct sdma_channel *sdmac = &sdma->channel[channel]; in sdma_int_handler()
882 * sets the pc of SDMA script according to the peripheral type
887 struct sdma_engine *sdma = sdmac->sdma; in sdma_get_pc() local
902 emi_2_emi = sdma->script_addrs->ap_2_ap_addr; in sdma_get_pc()
905 emi_2_per = sdma->script_addrs->bp_2_ap_addr; in sdma_get_pc()
906 per_2_emi = sdma->script_addrs->ap_2_bp_addr; in sdma_get_pc()
909 per_2_emi = sdma->script_addrs->firi_2_mcu_addr; in sdma_get_pc()
910 emi_2_per = sdma->script_addrs->mcu_2_firi_addr; in sdma_get_pc()
913 per_2_emi = sdma->script_addrs->uart_2_mcu_addr; in sdma_get_pc()
914 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
917 per_2_emi = sdma->script_addrs->uartsh_2_mcu_addr; in sdma_get_pc()
918 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
921 per_2_emi = sdma->script_addrs->ata_2_mcu_addr; in sdma_get_pc()
922 emi_2_per = sdma->script_addrs->mcu_2_ata_addr; in sdma_get_pc()
928 per_2_emi = sdma->script_addrs->app_2_mcu_addr; in sdma_get_pc()
929 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
932 per_2_emi = sdma->script_addrs->ssish_2_mcu_addr; in sdma_get_pc()
933 emi_2_per = sdma->script_addrs->mcu_2_ssish_addr; in sdma_get_pc()
941 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
942 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
945 per_2_emi = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
946 emi_2_per = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
947 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
950 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
951 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
952 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
955 per_2_emi = sdma->script_addrs->mshc_2_mcu_addr; in sdma_get_pc()
956 emi_2_per = sdma->script_addrs->mcu_2_mshc_addr; in sdma_get_pc()
959 per_2_emi = sdma->script_addrs->dptc_dvfs_addr; in sdma_get_pc()
962 per_2_emi = sdma->script_addrs->spdif_2_mcu_addr; in sdma_get_pc()
963 emi_2_per = sdma->script_addrs->mcu_2_spdif_addr; in sdma_get_pc()
966 emi_2_per = sdma->script_addrs->ext_mem_2_ipu_addr; in sdma_get_pc()
980 struct sdma_engine *sdma = sdmac->sdma; in sdma_load_context() local
983 struct sdma_context_data *context = sdma->context; in sdma_load_context()
984 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_context()
1003 dev_dbg(sdma->dev, "load_address = %d\n", load_address); in sdma_load_context()
1004 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level); in sdma_load_context()
1005 dev_dbg(sdma->dev, "shp_addr = 0x%08x\n", sdmac->shp_addr); in sdma_load_context()
1006 dev_dbg(sdma->dev, "per_addr = 0x%08x\n", sdmac->per_addr); in sdma_load_context()
1007 dev_dbg(sdma->dev, "event_mask0 = 0x%08x\n", (u32)sdmac->event_mask[0]); in sdma_load_context()
1008 dev_dbg(sdma->dev, "event_mask1 = 0x%08x\n", (u32)sdmac->event_mask[1]); in sdma_load_context()
1010 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_context()
1027 bd0->buffer_addr = sdma->context_phys; in sdma_load_context()
1029 ret = sdma_run_channel0(sdma); in sdma_load_context()
1031 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_context()
1046 struct sdma_engine *sdma = sdmac->sdma; in sdma_disable_channel() local
1049 writel_relaxed(BIT(channel), sdma->regs + SDMA_H_STATSTOP); in sdma_disable_channel()
1062 * According to NXP R&D team a delay of one BD SDMA cost time in sdma_channel_terminate_work()
1064 * bit, to ensure SDMA core has really been stopped after SDMA in sdma_channel_terminate_work()
1107 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_watermarklevel_for_p2p() local
1134 if (sdmac->per_address2 >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1135 sdmac->per_address2 <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1138 if (sdmac->per_address >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1139 sdmac->per_address <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1196 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_channel_priority() local
1204 writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel); in sdma_set_channel_priority()
1209 static int sdma_request_channel0(struct sdma_engine *sdma) in sdma_request_channel0() argument
1213 sdma->bd0 = dma_alloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys, in sdma_request_channel0()
1215 if (!sdma->bd0) { in sdma_request_channel0()
1220 sdma->channel_control[0].base_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1221 sdma->channel_control[0].current_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1223 sdma_set_channel_priority(&sdma->channel[0], MXC_SDMA_DEFAULT_PRIORITY); in sdma_request_channel0()
1236 desc->bd = dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, in sdma_alloc_bd()
1250 dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, in sdma_free_bd()
1279 dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n"); in sdma_alloc_chan_resources()
1306 ret = clk_enable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1309 ret = clk_enable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1320 clk_disable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1322 clk_disable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1329 struct sdma_engine *sdma = sdmac->sdma; in sdma_free_chan_resources() local
1345 clk_disable(sdma->clk_ipg); in sdma_free_chan_resources()
1346 clk_disable(sdma->clk_ahb); in sdma_free_chan_resources()
1392 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_memcpy() local
1402 dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n", in sdma_prep_memcpy()
1432 dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n", in sdma_prep_memcpy()
1449 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_slave_sg() local
1461 dev_dbg(sdma->dev, "setting up %d entries for channel %d.\n", in sdma_prep_slave_sg()
1473 dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n", in sdma_prep_slave_sg()
1510 dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n", in sdma_prep_slave_sg()
1533 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_dma_cyclic() local
1539 dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); in sdma_prep_dma_cyclic()
1552 dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n", in sdma_prep_dma_cyclic()
1576 dev_dbg(sdma->dev, "entry %d: count: %zu dma: %#llx %s%s\n", in sdma_prep_dma_cyclic()
1635 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1640 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1705 static void sdma_add_scripts(struct sdma_engine *sdma, in sdma_add_scripts() argument
1709 s32 *saddr_arr = (u32 *)sdma->script_addrs; in sdma_add_scripts()
1713 if (!sdma->script_number) in sdma_add_scripts()
1714 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_add_scripts()
1716 if (sdma->script_number > sizeof(struct sdma_script_start_addrs) in sdma_add_scripts()
1718 dev_err(sdma->dev, in sdma_add_scripts()
1719 "SDMA script number %d not match with firmware.\n", in sdma_add_scripts()
1720 sdma->script_number); in sdma_add_scripts()
1724 for (i = 0; i < sdma->script_number; i++) in sdma_add_scripts()
1731 struct sdma_engine *sdma = context; in sdma_load_firmware() local
1737 dev_info(sdma->dev, "external firmware not found, using ROM firmware\n"); in sdma_load_firmware()
1753 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_load_firmware()
1756 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2; in sdma_load_firmware()
1759 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3; in sdma_load_firmware()
1762 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4; in sdma_load_firmware()
1765 dev_err(sdma->dev, "unknown firmware version\n"); in sdma_load_firmware()
1772 clk_enable(sdma->clk_ipg); in sdma_load_firmware()
1773 clk_enable(sdma->clk_ahb); in sdma_load_firmware()
1774 /* download the RAM image for SDMA */ in sdma_load_firmware()
1775 sdma_load_script(sdma, ram_code, in sdma_load_firmware()
1778 clk_disable(sdma->clk_ipg); in sdma_load_firmware()
1779 clk_disable(sdma->clk_ahb); in sdma_load_firmware()
1781 sdma_add_scripts(sdma, addr); in sdma_load_firmware()
1783 dev_info(sdma->dev, "loaded firmware %d.%d\n", in sdma_load_firmware()
1793 static int sdma_event_remap(struct sdma_engine *sdma) in sdma_event_remap() argument
1795 struct device_node *np = sdma->dev->of_node; in sdma_event_remap()
1799 char propname[] = "fsl,sdma-event-remap"; in sdma_event_remap()
1809 dev_dbg(sdma->dev, "no event needs to be remapped\n"); in sdma_event_remap()
1812 dev_err(sdma->dev, "the property %s must modulo %d\n", in sdma_event_remap()
1820 dev_err(sdma->dev, "failed to get gpr regmap\n"); in sdma_event_remap()
1828 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1835 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1842 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1857 static int sdma_get_firmware(struct sdma_engine *sdma, in sdma_get_firmware() argument
1863 FW_ACTION_HOTPLUG, fw_name, sdma->dev, in sdma_get_firmware()
1864 GFP_KERNEL, sdma, sdma_load_firmware); in sdma_get_firmware()
1869 static int sdma_init(struct sdma_engine *sdma) in sdma_init() argument
1874 ret = clk_enable(sdma->clk_ipg); in sdma_init()
1877 ret = clk_enable(sdma->clk_ahb); in sdma_init()
1881 if (sdma->drvdata->check_ratio && in sdma_init()
1882 (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))) in sdma_init()
1883 sdma->clk_ratio = 1; in sdma_init()
1885 /* Be sure SDMA has not started yet */ in sdma_init()
1886 writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1888 sdma->channel_control = dma_alloc_coherent(sdma->dev, in sdma_init()
1893 if (!sdma->channel_control) { in sdma_init()
1898 sdma->context = (void *)sdma->channel_control + in sdma_init()
1900 sdma->context_phys = ccb_phys + in sdma_init()
1904 for (i = 0; i < sdma->drvdata->num_events; i++) in sdma_init()
1905 writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i)); in sdma_init()
1909 writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4); in sdma_init()
1911 ret = sdma_request_channel0(sdma); in sdma_init()
1915 sdma_config_ownership(&sdma->channel[0], false, true, false); in sdma_init()
1918 writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); in sdma_init()
1921 if (sdma->clk_ratio) in sdma_init()
1922 writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1924 writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1926 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1929 sdma_set_channel_priority(&sdma->channel[0], 7); in sdma_init()
1931 clk_disable(sdma->clk_ipg); in sdma_init()
1932 clk_disable(sdma->clk_ahb); in sdma_init()
1937 clk_disable(sdma->clk_ahb); in sdma_init()
1939 clk_disable(sdma->clk_ipg); in sdma_init()
1940 dev_err(sdma->dev, "initialisation failed with %d\n", ret); in sdma_init()
1961 struct sdma_engine *sdma = ofdma->of_dma_data; in sdma_xlate() local
1962 dma_cap_mask_t mask = sdma->dma_device.cap_mask; in sdma_xlate()
1997 struct sdma_engine *sdma; in sdma_probe() local
2015 sdma = devm_kzalloc(&pdev->dev, sizeof(*sdma), GFP_KERNEL); in sdma_probe()
2016 if (!sdma) in sdma_probe()
2019 spin_lock_init(&sdma->channel_0_lock); in sdma_probe()
2021 sdma->dev = &pdev->dev; in sdma_probe()
2022 sdma->drvdata = drvdata; in sdma_probe()
2029 sdma->regs = devm_ioremap_resource(&pdev->dev, iores); in sdma_probe()
2030 if (IS_ERR(sdma->regs)) in sdma_probe()
2031 return PTR_ERR(sdma->regs); in sdma_probe()
2033 sdma->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in sdma_probe()
2034 if (IS_ERR(sdma->clk_ipg)) in sdma_probe()
2035 return PTR_ERR(sdma->clk_ipg); in sdma_probe()
2037 sdma->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in sdma_probe()
2038 if (IS_ERR(sdma->clk_ahb)) in sdma_probe()
2039 return PTR_ERR(sdma->clk_ahb); in sdma_probe()
2041 ret = clk_prepare(sdma->clk_ipg); in sdma_probe()
2045 ret = clk_prepare(sdma->clk_ahb); in sdma_probe()
2049 ret = devm_request_irq(&pdev->dev, irq, sdma_int_handler, 0, "sdma", in sdma_probe()
2050 sdma); in sdma_probe()
2054 sdma->irq = irq; in sdma_probe()
2056 sdma->script_addrs = kzalloc(sizeof(*sdma->script_addrs), GFP_KERNEL); in sdma_probe()
2057 if (!sdma->script_addrs) { in sdma_probe()
2063 saddr_arr = (s32 *)sdma->script_addrs; in sdma_probe()
2064 for (i = 0; i < sizeof(*sdma->script_addrs) / sizeof(s32); i++) in sdma_probe()
2067 dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask); in sdma_probe()
2068 dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask); in sdma_probe()
2069 dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask); in sdma_probe()
2071 INIT_LIST_HEAD(&sdma->dma_device.channels); in sdma_probe()
2074 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_probe()
2076 sdmac->sdma = sdma; in sdma_probe()
2084 * because we need it internally in the SDMA driver. This also means in sdma_probe()
2085 * that channel 0 in dmaengine counting matches sdma channel 1. in sdma_probe()
2088 vchan_init(&sdmac->vc, &sdma->dma_device); in sdma_probe()
2091 ret = sdma_init(sdma); in sdma_probe()
2095 ret = sdma_event_remap(sdma); in sdma_probe()
2099 if (sdma->drvdata->script_addrs) in sdma_probe()
2100 sdma_add_scripts(sdma, sdma->drvdata->script_addrs); in sdma_probe()
2102 sdma_add_scripts(sdma, pdata->script_addrs); in sdma_probe()
2104 sdma->dma_device.dev = &pdev->dev; in sdma_probe()
2106 sdma->dma_device.device_alloc_chan_resources = sdma_alloc_chan_resources; in sdma_probe()
2107 sdma->dma_device.device_free_chan_resources = sdma_free_chan_resources; in sdma_probe()
2108 sdma->dma_device.device_tx_status = sdma_tx_status; in sdma_probe()
2109 sdma->dma_device.device_prep_slave_sg = sdma_prep_slave_sg; in sdma_probe()
2110 sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic; in sdma_probe()
2111 sdma->dma_device.device_config = sdma_config; in sdma_probe()
2112 sdma->dma_device.device_terminate_all = sdma_terminate_all; in sdma_probe()
2113 sdma->dma_device.device_synchronize = sdma_channel_synchronize; in sdma_probe()
2114 sdma->dma_device.src_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2115 sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2116 sdma->dma_device.directions = SDMA_DMA_DIRECTIONS; in sdma_probe()
2117 sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; in sdma_probe()
2118 sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy; in sdma_probe()
2119 sdma->dma_device.device_issue_pending = sdma_issue_pending; in sdma_probe()
2120 sdma->dma_device.copy_align = 2; in sdma_probe()
2121 dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT); in sdma_probe()
2123 platform_set_drvdata(pdev, sdma); in sdma_probe()
2125 ret = dma_async_device_register(&sdma->dma_device); in sdma_probe()
2132 ret = of_dma_controller_register(np, sdma_xlate, sdma); in sdma_probe()
2141 sdma->spba_start_addr = spba_res.start; in sdma_probe()
2142 sdma->spba_end_addr = spba_res.end; in sdma_probe()
2150 * the firmware callback requires a fully functional and allocated sdma in sdma_probe()
2154 ret = sdma_get_firmware(sdma, pdata->fw_name); in sdma_probe()
2163 ret = of_property_read_string(np, "fsl,sdma-ram-script-name", in sdma_probe()
2168 ret = sdma_get_firmware(sdma, fw_name); in sdma_probe()
2177 dma_async_device_unregister(&sdma->dma_device); in sdma_probe()
2179 kfree(sdma->script_addrs); in sdma_probe()
2181 clk_unprepare(sdma->clk_ahb); in sdma_probe()
2183 clk_unprepare(sdma->clk_ipg); in sdma_probe()
2189 struct sdma_engine *sdma = platform_get_drvdata(pdev); in sdma_remove() local
2192 devm_free_irq(&pdev->dev, sdma->irq, sdma); in sdma_remove()
2193 dma_async_device_unregister(&sdma->dma_device); in sdma_remove()
2194 kfree(sdma->script_addrs); in sdma_remove()
2195 clk_unprepare(sdma->clk_ahb); in sdma_remove()
2196 clk_unprepare(sdma->clk_ipg); in sdma_remove()
2199 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_remove()
2211 .name = "imx-sdma",
2222 MODULE_DESCRIPTION("i.MX SDMA driver");
2224 MODULE_FIRMWARE("imx/sdma/sdma-imx6q.bin");
2227 MODULE_FIRMWARE("imx/sdma/sdma-imx7d.bin");