Lines Matching refs:cctl

204 	u32 cctl;  member
968 u32 cctl, in pl08x_get_bytes_for_lli() argument
975 val = (cctl & FTDMAC020_LLI_SRC_WIDTH_MSK) >> in pl08x_get_bytes_for_lli()
978 val = (cctl & FTDMAC020_LLI_DST_WIDTH_MSK) >> in pl08x_get_bytes_for_lli()
982 val = (cctl & PL080_CONTROL_SWIDTH_MASK) >> in pl08x_get_bytes_for_lli()
985 val = (cctl & PL080_CONTROL_DWIDTH_MASK) >> in pl08x_get_bytes_for_lli()
1004 u32 cctl, in pl08x_lli_control_bits() argument
1008 u32 retbits = cctl; in pl08x_lli_control_bits()
1127 u32 cctl) in pl08x_choose_master_bus() argument
1140 dst_incr = !!(cctl & PL080_CONTROL_DST_INCR); in pl08x_choose_master_bus()
1141 src_incr = !!(cctl & PL080_CONTROL_SRC_INCR); in pl08x_choose_master_bus()
1170 int num_llis, int len, u32 cctl, u32 cctl2) in pl08x_fill_lli_for_desc() argument
1185 llis_va[PL080_LLI_CCTL] = cctl; in pl08x_fill_lli_for_desc()
1194 if (cctl & PL080_CONTROL_SRC_INCR) in pl08x_fill_lli_for_desc()
1196 if (cctl & PL080_CONTROL_DST_INCR) in pl08x_fill_lli_for_desc()
1206 struct pl08x_lli_build_data *bd, u32 *cctl, u32 len, in prep_byte_width_lli() argument
1209 *cctl = pl08x_lli_control_bits(pl08x, *cctl, 1, 1, len); in prep_byte_width_lli()
1210 pl08x_fill_lli_for_desc(pl08x, bd, num_llis, len, *cctl, len); in prep_byte_width_lli()
1263 u32 cctl, early_bytes = 0; in pl08x_fill_llis_for_desc() local
1276 cctl = txd->cctl; in pl08x_fill_llis_for_desc()
1279 bd.srcbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, true); in pl08x_fill_llis_for_desc()
1282 bd.dstbus.maxwidth = pl08x_get_bytes_for_lli(pl08x, cctl, false); in pl08x_fill_llis_for_desc()
1286 cctl = txd->cctl; in pl08x_fill_llis_for_desc()
1294 pl08x_choose_master_bus(pl08x, &bd, &mbus, &sbus, cctl); in pl08x_fill_llis_for_desc()
1299 cctl & PL080_CONTROL_SRC_INCR ? "+" : "", in pl08x_fill_llis_for_desc()
1302 cctl & PL080_CONTROL_DST_INCR ? "+" : "", in pl08x_fill_llis_for_desc()
1355 cctl = pl08x_lli_control_bits(pl08x, cctl, in pl08x_fill_llis_for_desc()
1359 0, cctl, 0); in pl08x_fill_llis_for_desc()
1381 prep_byte_width_lli(pl08x, &bd, &cctl, early_bytes, in pl08x_fill_llis_for_desc()
1436 cctl = pl08x_lli_control_bits(pl08x, cctl, in pl08x_fill_llis_for_desc()
1440 lli_len, cctl, tsize); in pl08x_fill_llis_for_desc()
1451 prep_byte_width_lli(pl08x, &bd, &cctl, in pl08x_fill_llis_for_desc()
1652 u32 cctl = 0; in pl08x_select_bus() local
1666 cctl |= dst_ahb2; in pl08x_select_bus()
1668 cctl |= src_ahb2; in pl08x_select_bus()
1670 return cctl; in pl08x_select_bus()
1673 static u32 pl08x_cctl(u32 cctl) in pl08x_cctl() argument
1675 cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 | in pl08x_cctl()
1680 return cctl | PL080_CONTROL_PROT_SYS; in pl08x_cctl()
1711 u32 width, burst, cctl = 0; in pl08x_get_cctl() local
1717 cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; in pl08x_get_cctl()
1718 cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; in pl08x_get_cctl()
1729 cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; in pl08x_get_cctl()
1730 cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; in pl08x_get_cctl()
1732 return pl08x_cctl(cctl); in pl08x_get_cctl()
1763 u32 cctl = 0; in pl08x_memcpy_cctl() local
1772 cctl |= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1776 cctl |= PL080_BSIZE_4 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1780 cctl |= PL080_BSIZE_8 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1784 cctl |= PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1788 cctl |= PL080_BSIZE_32 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1792 cctl |= PL080_BSIZE_64 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1796 cctl |= PL080_BSIZE_128 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1800 cctl |= PL080_BSIZE_256 << PL080_CONTROL_SB_SIZE_SHIFT | in pl08x_memcpy_cctl()
1811 cctl |= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT | in pl08x_memcpy_cctl()
1815 cctl |= PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT | in pl08x_memcpy_cctl()
1819 cctl |= PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | in pl08x_memcpy_cctl()
1826 cctl |= PL080_CONTROL_PROT_BUFF; in pl08x_memcpy_cctl()
1828 cctl |= PL080_CONTROL_PROT_CACHE; in pl08x_memcpy_cctl()
1831 cctl |= PL080_CONTROL_PROT_SYS; in pl08x_memcpy_cctl()
1834 cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; in pl08x_memcpy_cctl()
1837 cctl |= pl08x_select_bus(false, in pl08x_memcpy_cctl()
1841 return cctl; in pl08x_memcpy_cctl()
1846 u32 cctl = 0; in pl08x_ftdmac020_memcpy_cctl() local
1855 cctl |= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | in pl08x_ftdmac020_memcpy_cctl()
1859 cctl |= PL080_WIDTH_16BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | in pl08x_ftdmac020_memcpy_cctl()
1863 cctl |= PL080_WIDTH_32BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT | in pl08x_ftdmac020_memcpy_cctl()
1872 cctl |= FTDMAC020_LLI_TC_MSK; in pl08x_ftdmac020_memcpy_cctl()
1879 cctl |= pl08x_select_bus(true, in pl08x_ftdmac020_memcpy_cctl()
1883 return cctl; in pl08x_ftdmac020_memcpy_cctl()
1919 txd->cctl = pl08x_ftdmac020_memcpy_cctl(pl08x); in pl08x_prep_dma_memcpy()
1924 txd->cctl = pl08x_memcpy_cctl(pl08x); in pl08x_prep_dma_memcpy()
1947 u32 maxburst, cctl; in pl08x_init_txd() local
1961 cctl = PL080_CONTROL_SRC_INCR; in pl08x_init_txd()
1968 cctl = PL080_CONTROL_DST_INCR; in pl08x_init_txd()
1981 cctl |= pl08x_get_cctl(plchan, addr_width, maxburst); in pl08x_init_txd()
1982 if (cctl == ~0) { in pl08x_init_txd()
1989 txd->cctl = cctl | pl08x_select_bus(false, src_buses, dst_buses); in pl08x_init_txd()
2113 txd->cctl |= PL080_CONTROL_TC_IRQ_EN; in pl08x_prep_dma_cyclic()