843 	unsigned int ctxarb_ctl, ctx_enables;  in qat_hal_exec_micro_inst()  local
861 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_exec_micro_inst()
862 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_exec_micro_inst()
872 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
918 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_exec_micro_inst()
929 	unsigned int ctxarb_cntl, ustore_addr, ctx_enables;  in qat_hal_rd_rel_reg()  local
949 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_rd_rel_reg()
950 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_rd_rel_reg()
955 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
979 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_rd_rel_reg()
1145 	unsigned int ctx_enables;  in qat_hal_put_rel_rd_xfer()  local
1149 	status = ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_rd_xfer()
1150 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_rd_xfer()
1184 	unsigned int gprval, ctx_enables;  in qat_hal_put_rel_wr_xfer()  local
1199 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_wr_xfer()
1200 	if (CE_INUSE_CONTEXTS & ctx_enables) {  in qat_hal_put_rel_wr_xfer()
1240 	unsigned int ctx_enables;  in qat_hal_put_rel_nn()  local
1243 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_put_rel_nn()
1244 	ctx_enables &= IGNORE_W1C_MASK;  in qat_hal_put_rel_nn()
1245 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables | CE_NN_MODE);  in qat_hal_put_rel_nn()
1248 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx_enables);  in qat_hal_put_rel_nn()
1258 	unsigned int ctx_enables;  in qat_hal_convert_abs_to_rel()  local
1260 	ctx_enables = qat_hal_rd_ae_csr(handle, ae, CTX_ENABLES);  in qat_hal_convert_abs_to_rel()
1261 	if (ctx_enables & CE_INUSE_CONTEXTS) {  in qat_hal_convert_abs_to_rel()