1 // SPDX-License-Identifier: GPL-2.0-or-later
12 #include <asm/pm-cps.h>
17 	STATE_NC_WAIT,		/* MIPS wait instruction, non-coherent */
18 	STATE_CLOCK_GATED,	/* Core clock gated */
19 	STATE_POWER_GATED,	/* Core power gated */
30 	 * At least one core must remain powered up & clocked in order for the  in cps_nc_enter()
33 	 * TODO: don't treat core 0 specially, just prevent the final core  in cps_nc_enter()
36 	if (cpus_are_siblings(0, dev->cpu) && (index > STATE_NC_WAIT))  in cps_nc_enter()
52 		return -EINVAL;  in cps_nc_enter()
55 	/* Notify listeners the CPU is about to power down */  in cps_nc_enter()
57 		return -EINTR;  in cps_nc_enter()
62 	/* Notify listeners the CPU is back up */  in cps_nc_enter()
78 			.name	= "nc-wait",
79 			.desc	= "non-coherent MIPS wait",
86 			.name	= "clock-gated",
87 			.desc	= "core clock gated",
94 			.name	= "power-gated",
95 			.desc	= "core power gated",
104 	int cpu;  in cps_cpuidle_unregister()  local
107 	for_each_possible_cpu(cpu) {  in cps_cpuidle_unregister()
108 		device = &per_cpu(cpuidle_dev, cpu);  in cps_cpuidle_unregister()
117 	int err, cpu, i;  in cps_cpuidle_init()  local
130 		pr_info("cpuidle-cps: limited to ");  in cps_cpuidle_init()
131 		switch (cps_driver.state_count - 1) {  in cps_cpuidle_init()
136 			pr_cont("non-coherent wait\n");  in cps_cpuidle_init()
158 	for_each_possible_cpu(cpu) {  in cps_cpuidle_init()
159 		device = &per_cpu(cpuidle_dev, cpu);  in cps_cpuidle_init()
160 		device->cpu = cpu;  in cps_cpuidle_init()
162 		cpumask_copy(&device->coupled_cpus, &cpu_sibling_map[cpu]);  in cps_cpuidle_init()
167 			pr_err("Failed to register CPU%d cpuidle device\n",  in cps_cpuidle_init()
168 			       cpu);  in cps_cpuidle_init()