24 	struct clk *dfll_clk;  member
33 	ret = clk_set_rate(priv->dfll_clk, clk_get_rate(priv->cpu_clk));  in tegra124_cpu_switch_to_dfll()
40 	ret = clk_prepare_enable(priv->dfll_clk);  in tegra124_cpu_switch_to_dfll()
44 	clk_set_parent(priv->cpu_clk, priv->dfll_clk);  in tegra124_cpu_switch_to_dfll()
80 	priv->dfll_clk = of_clk_get_by_name(np, "dfll");  in tegra124_cpufreq_probe()
81 	if (IS_ERR(priv->dfll_clk)) {  in tegra124_cpufreq_probe()
82 		ret = PTR_ERR(priv->dfll_clk);  in tegra124_cpufreq_probe()
123 	clk_put(priv->dfll_clk);  in tegra124_cpufreq_probe()
148 	clk_disable_unprepare(priv->dfll_clk);  in tegra124_cpufreq_suspend()
162 	err = clk_prepare_enable(priv->dfll_clk);  in tegra124_cpufreq_resume()
168 	err = clk_set_parent(priv->cpu_clk, priv->dfll_clk);  in tegra124_cpufreq_resume()
177 	clk_disable_unprepare(priv->dfll_clk);  in tegra124_cpufreq_resume()