Lines Matching full:hclk

27 	struct clk *hclk;  member
130 pr_debug("cpufreq: switching armclk to hclk (%lukHz)\n", in s3c2416_cpufreq_enter_dvs()
131 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_enter_dvs()
132 ret = clk_set_parent(s3c_freq->armclk, s3c_freq->hclk); in s3c2416_cpufreq_enter_dvs()
134 pr_err("cpufreq: Failed to switch armclk to hclk: %d\n", ret); in s3c2416_cpufreq_enter_dvs()
188 /* force armdiv to hclk frequency for transition from dvs*/ in s3c2416_cpufreq_leave_dvs()
189 if (clk_get_rate(s3c_freq->armdiv) > clk_get_rate(s3c_freq->hclk)) { in s3c2416_cpufreq_leave_dvs()
190 pr_debug("cpufreq: force armdiv to hclk frequency (%lukHz)\n", in s3c2416_cpufreq_leave_dvs()
191 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_leave_dvs()
193 clk_get_rate(s3c_freq->hclk) / 1000); in s3c2416_cpufreq_leave_dvs()
196 clk_get_rate(s3c_freq->hclk) / 1000, ret); in s3c2416_cpufreq_leave_dvs()
237 /* When leavin dvs mode, always switch the armdiv to the hclk rate in s3c2416_cpufreq_set_target()
242 ? clk_get_rate(s3c_freq->hclk) / 1000 in s3c2416_cpufreq_set_target()
397 s3c_freq->hclk = clk_get(NULL, "hclk"); in s3c2416_cpufreq_driver_init()
398 if (IS_ERR(s3c_freq->hclk)) { in s3c2416_cpufreq_driver_init()
399 ret = PTR_ERR(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()
400 pr_err("cpufreq: Unable to obtain HCLK: %d\n", ret); in s3c2416_cpufreq_driver_init()
404 /* chech hclk rate, we only support the common 133MHz for now in s3c2416_cpufreq_driver_init()
405 * hclk could also run at 66MHz, but this not often used in s3c2416_cpufreq_driver_init()
407 rate = clk_get_rate(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()
409 pr_err("cpufreq: HCLK not at 133MHz\n"); in s3c2416_cpufreq_driver_init()
437 if (!s3c_freq->hclk) { in s3c2416_cpufreq_driver_init()
471 clk_put(s3c_freq->hclk); in s3c2416_cpufreq_driver_init()